Re: AMD64, 4GB, mttr questions

[thockin]

On Tue, Jan 24, 2006 at 02:33:46PM +0100, Prakash Punnoor wrote:
> I have a machine with 4GB RAM, an Athlon64 X2 and following mttr entries:
> 
> reg00: base=0x00000000 (   0MB), size=4096MB: write-back, count=1
> reg01: base=0x100000000 (4096MB), size=2048MB: write-back, count=1
> reg02: base=0x80000000 (2048MB), size=2048MB: uncachable, count=1
> 
> First of all, why is there an uncachable region? Is it the upper half of 
> memory? Or is this just a hole and the remaining 2GB are seated at 
> 0x100000000 ?

That's the IO hole between 2 and 4 GB.  Your setup looks fine to me.  It's
perfectly valid to have an uncacheable region overlap a write-back region.
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