Intel manual (and KVM definition) say it's TPR is 4 bits wide. Also fix
CR8_RESEVED_BITS typo.
Signed-off-by: Rusty Russell <rusty@xxxxxxxxxxxxxxx>
diff -r 6ef0b4c0d6f7 include/asm-i386/processor-flags.h
--- a/include/asm-i386/processor-flags.h Tue Jul 17 18:07:48 2007 +1000
+++ b/include/asm-i386/processor-flags.h Tue Jul 17 18:12:54 2007 +1000
@@ -63,7 +63,7 @@
/*
* x86-64 Task Priority Register, CR8
*/
-#define X86_CR8_TPR 0x00000007 /* task priority register */
+#define X86_CR8_TPR 0x0000000F /* task priority register */
/*
* AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>