On Sun, 2007-07-22 at 21:04 -0700, david@xxxxxxx wrote:
this strategy should work well on the normal unpredictable workload that
most people deal with, but there are some cases where the workload becomes
pretty predictable (media players for example) where there really is less
variation, and a need for a constant availability of the cpu, so it may
actually save a smidge of power to run below the highest freq that the
voltage allows rather then running faster and being idle more cycles.
that actually is the example showcase of race-to-idle where you
absolutely want to run at the highest frequency..
only if the transitions don't cost anything significant,
these are second order effects though. On a pc, the transition costs are
quite low (as I said, single or low double digit microseconds).
and the
computation capacity per watt of power is the same at all frequencies. the
chip performance numbers I've been seeing (which I admit are mostly
embedded datasheets) indicate that neither of these hold true.
let me give you a real world example then, and the numbers I'm using are
ballpark the same as you'll find in a (mobile) core 2 duo datasheet, I
just rounded them a little so that the math works out nice.
power at full speed: 34W
power at half speed: 24W
power at idle: 1W
assume media playback, and a dumb one, that takes half a second to
decode a second of media. (again to make the math simple)
at half speed: Energy for a second is 0.5 * 24 + 0.5 * 1 = 12.5 J
at full speed: Energy for a second is 0.25 * 34 + 0.75 * 1 = 9.25 J
this works for all systems where the idle power is more lower than the
power you save by dropping speed... and that is almost all of them in
the PC world.
now you can argue that 0.5 seconds is a really really long time, and
you'd be right. so for really really short stints (say a timer
interrupt) you don't want to change the voltage at all (nor would you
want to change the plls to change frequency for that matter). But once
you start chaning those, you might as well go full speed.