Re: [patch 01/23] Fall back on interrupt disable in cmpxchg8b on 80386 and 80486
From: Mathieu Desnoyers
Date: Sun Aug 12 2007 - 12:23:57 EST
* Jan Engelhardt (jengelh@xxxxxxxxxxxxxxx) wrote:
>
> On Aug 12 2007 10:54, Mathieu Desnoyers wrote:
>
> >Date: Sun, 12 Aug 2007 10:54:35 -0400
> >From: Mathieu Desnoyers <mathieu.desnoyers@xxxxxxxxxx>
> >To: <akpm@xxxxxxxxxxxxxxxxxxxx>, <linux-kernel@xxxxxxxxxxxxxxx>
> >Cc: Christoph Lameter <clameter@xxxxxxx>,
> > Mathieu Desnoyers <mathieu.desnoyers@xxxxxxxxxx>, <mingo@xxxxxxxxxx>
> >Subject: [patch 01/23] Fall back on interrupt disable in cmpxchg8b on 80386 and
> > 80486
> >
> >Actually, on 386, cmpxchg and cmpxchg_local fall back on
> >cmpxchg_386_u8/16/32: it disables interruptions around non atomic
> >updates to mimic the cmpxchg behavior.
> >
> >The comment:
> >/* Poor man's cmpxchg for 386. Unsuitable for SMP */
> >
> >already present in cmpxchg_386_u32 tells much about how this cmpxchg
> >implementation should not be used in a SMP context. However, the cmpxchg_local
> >can perfectly use this fallback, since it only needs to be atomic wrt the local
> >cpu.
> >
> >This patch adds a cmpxchg_486_u64 and uses it as a fallback for cmpxchg64
> >and cmpxchg64_local on 80386 and 80486.
>
> hm, but why is it called cmpxchg_486 when the other functions are called
> cmpxchg_386?
>
Because the standard cmpxchg is missing only on 386, but cmpxchg8b is
missing both on 386 and 486.
Citing Intel's Instruction set reference:
cmpxchg:
This instruction is not supported on Intel processors earlier than the
Intel486 processors.
cmpxchg8b:
This instruction encoding is not supported on Intel processors earlier
than the Pentium processors.
Mathieu
>
> Jan
> --
--
Mathieu Desnoyers
Computer Engineering Ph.D. Student, Ecole Polytechnique de Montreal
OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68
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