Re: PCI resource unavailable on mips

[Sergei Shtylyov]

Hello.

Jon Dufresne wrote:

> I did a bit more work and investigation on this and it turns out I could
> not read the mmio in kernel space because I had not done a
> pci_enable_device_bars() on the device. I had never done this on x86 so
> I didn't realize it was necessary.

> > The virtual address 0xc0300000 looks sensible and the physical address
> > 0x24000000 is consistent with what you found in the BAR registers.  So that
> > all looks reasonable but that only means not obviously wrong.  So next I
> > wonder what the value of PCI_MMIO_BASE is ...

> The PCI_MMIO_BASE is a defined as:

> > #define PCI_MMIO_BASE            (0x00040000)

> This is define in the technical documentation as the offset to access
> pci config space from the mmio.

   From what mmio? If it's for accessing a config. space why then you're 
using it as an offset from BAR?

> I am using this because I know what the
> values should be so it provides a nice sanity check.

> Any idea what I might be doing wrong? How can I access this from user
> space?

   Your example doesn't make sense to me so far.

> Thanks,
> Jon

WBR, Sergei
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/