Re: [PATCH]: PCI: GART iommu alignment fixes [v2]

[Prarit Bhargava]

> But I think Prarit is right with this change. If the interface defines
> this behavior the IOMMU drivers have to implement it. I am just
> wondering that the problem never showed up before. The GART driver is a
> few years old now.
>
>   

Joerg -- there's an easy explanation for this.  This will only happen 
when a 32-bit device requests DMA memory and all memory below 4G is 
used.  Just doing a quick overview of a few systems, allocated DMA 
memory is usually less than 512M of the system memory so it is unlikely 
a system hits the 4G limit.

In addition to that most systems do not reserve all or most of the lower 
4G in the e820 maps.  Those that do are usually larger systems.

ie) The only reason we're seeing this now is because large memory 
footprint systems are coming online -- IMO ;)

P.

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