Re: [PATCH -tip] perf_counter/x86: Correct some event and umaskvalues for Intel processors

[Yong Wang]

> > Btw, one thing I don't quite understand is why you aliased 
> > dtlb-write-ops to l1d-write-ops when setting event and umask 
> > values. Are they the same event?
> 
> No, they are indeed different events - that's a bug in the table, 
> good spotting. Mind sending a (tested) patch for it?
> 

I'm a little confused. By dtlb-write-ops, do you want to count the
number of times that DTLB is accessed due to store operations or the
number of times that DTLB entries are written to, i.e. updated?

Btw, do you know whether virtual cache is employed or not on
atom/core2/nehalem so that tlb won't be accessed when accessing l1
caches?

-Yong
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