Re: [PATCHv2 04/11] mxc: changes to common plat-mxc code to add support for i.MX5

From: Eric Miao
Date: Wed Feb 03 2010 - 01:44:04 EST

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On Tue, Feb 2, 2010 at 9:16 PM, Amit Kucheria
<amit.kucheria@xxxxxxxxxxxxx> wrote:
> Changes separted to help in the review process
>
> Signed-off-by: Amit Kucheria <amit.kucheria@xxxxxxxxxxxxx>
> ---
> Âarch/arm/plat-mxc/include/mach/common.h Â Â Â| Â Â4 +++
> Âarch/arm/plat-mxc/include/mach/debug-macro.S | Â Â9 +++++++
> Âarch/arm/plat-mxc/include/mach/entry-macro.S | Â 34 +++++++++++++++++++++++++-
> Âarch/arm/plat-mxc/include/mach/hardware.h Â Â| Â Â4 +++
> Âarch/arm/plat-mxc/include/mach/irqs.h Â Â Â Â| Â Â9 ++++++-
> Âarch/arm/plat-mxc/include/mach/memory.h Â Â Â| Â Â3 ++
> Âarch/arm/plat-mxc/include/mach/mxc.h Â Â Â Â | Â 13 ++++++++++
> Âarch/arm/plat-mxc/include/mach/timex.h Â Â Â | Â Â2 +
> Âarch/arm/plat-mxc/time.c Â Â Â Â Â Â Â Â Â Â | Â Â6 ++--
> Â9 files changed, 79 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
> index 286cb9b..5250a3f 100644
> --- a/arch/arm/plat-mxc/include/mach/common.h
> +++ b/arch/arm/plat-mxc/include/mach/common.h
> @@ -20,8 +20,10 @@ extern void mx25_map_io(void);
> Âextern void mx27_map_io(void);
> Âextern void mx31_map_io(void);
> Âextern void mx35_map_io(void);
> +extern void mx51_map_io(void);
> Âextern void mxc91231_map_io(void);
> Âextern void mxc_init_irq(void __iomem *);
> +extern void tzic_init_irq(void __iomem *);
> Âextern void mx1_init_irq(void);
> Âextern void mx21_init_irq(void);
> Âextern void mx25_init_irq(void);
> @@ -36,6 +38,8 @@ extern int mx25_clocks_init(unsigned long fref);
> Âextern int mx27_clocks_init(unsigned long fref);
> Âextern int mx31_clocks_init(unsigned long fref);
> Âextern int mx35_clocks_init(void);
> +extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
> + Â Â Â Â Â Â Â Â Â Â Â unsigned long ckih1, unsigned long ckih2);
> Âextern int mxc91231_clocks_init(unsigned long fref);
> Âextern int mxc_register_gpios(void);
> Âextern int mxc_register_device(struct platform_device *pdev, void *data);
> diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
> index 15b2b14..9fe7300 100644
> --- a/arch/arm/plat-mxc/include/mach/debug-macro.S
> +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
> @@ -44,6 +44,15 @@
> Â#define UART_VADDR Â Â AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
> Â#endif
>
> +#ifdef CONFIG_ARCH_MX5
> +#ifdef UART_PADDR
> +#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
> +#endif
> +#include <mach/mx51.h>
> +#define UART_PADDR Â Â UART1_BASE_ADDR
> +#define UART_VADDR Â Â AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
> +#endif
> +
> Â#ifdef CONFIG_ARCH_MXC91231
> Â#ifdef UART_PADDR
> Â#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
> diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
> index 7cf290e..aeb0869 100644
> --- a/arch/arm/plat-mxc/include/mach/entry-macro.S
> +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
> @@ -1,6 +1,6 @@
> Â/*
> Â* ÂCopyright (C) 2007 Lennert Buytenhek <buytenh@xxxxxxxxxxxxxx>
> - * ÂCopyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
> + * ÂCopyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
> Â*/
>
> Â/*
> @@ -18,11 +18,16 @@
> Â Â Â Â.endm
>
> Â Â Â Â.macro Âget_irqnr_preamble, base, tmp
> +#ifndef CONFIG_MXC_TZIC
> Â Â Â Âldr Â Â \base, =avic_base
> Â Â Â Âldr Â Â \base, [\base]
> Â#ifdef CONFIG_MXC_IRQ_PRIOR
> Â Â Â Âldr Â Â r4, [\base, #AVIC_NIMASK]
> Â#endif
> +#elif defined CONFIG_MXC_TZIC
> + Â Â Â ldr Â Â \base, =tzic_base
> + Â Â Â ldr Â Â \base, [\base]
> +#endif /* CONFIG_MXC_TZIC */

Mmm.... this should be something that we really need to get rid of, it just
makes a single kernel for both TZIC and AVIC together impossible, if that's
so designed by HW, I'm thinking about keeping this into plat-mxc/ is a good
way to go ...

Sascha, you have any better idea? Provided the other file debug-macro.S in
the same directory already seems to break the support for multiple arches?

> Â Â Â Â.endm
>
> Â Â Â Â.macro Âarch_ret_to_user, tmp1, tmp2
> @@ -32,6 +37,7 @@
> Â Â Â Â@ and returns its number in irqnr
> Â Â Â Â@ and returns if an interrupt occured in irqstat
> Â Â Â Â.macro Âget_irqnr_and_base, irqnr, irqstat, base, tmp
> +#ifndef CONFIG_MXC_TZIC
> Â Â Â Â@ Load offset & priority of the highest priority
> Â Â Â Â@ interrupt pending from AVIC_NIVECSR
> Â Â Â Âldr Â Â \irqstat, [\base, #0x40]
> @@ -45,6 +51,32 @@
> Â Â Â Âstrne Â \tmp, [\base, #AVIC_NIMASK]
> Â Â Â Âstreq Â r4, [\base, #AVIC_NIMASK]
> Â#endif
> +#elif defined CONFIG_MXC_TZIC
> + Â Â Â @ Load offset & priority of the highest priority
> + Â Â Â @ interrupt pending.
> + Â Â Â @ 0xD80 is HIPND0 register
> + Â Â Â mov Â Â \irqnr, #0
> + Â Â Â mov Â Â \irqstat, #0x0D80
> +1000:
> + Â Â Â ldr Â Â \tmp, Â [\irqstat, \base]
> + Â Â Â cmp Â Â \tmp, #0
> + Â Â Â bne Â Â 1001f
> + Â Â Â addeq Â \irqnr, \irqnr, #32
> + Â Â Â addeq Â \irqstat, \irqstat, #4
> + Â Â Â cmp Â Â \irqnr, #128
> + Â Â Â blo Â Â 1000b
> + Â Â Â b Â Â Â 2001f
> +1001: Âmov Â Â \irqstat, #1
> +1002: Âtst Â Â \tmp, \irqstat
> + Â Â Â bne Â Â 2002f
> + Â Â Â movs Â Â\tmp, \tmp, lsr #1
> + Â Â Â addne Â \irqnr, \irqnr, #1
> + Â Â Â bne Â Â 1002b
> +2001:
> + Â Â Â mov Â\irqnr, #0
> +2002:
> + Â Â Â movs \irqnr, \irqnr
> +#endif
> Â Â Â Â.endm
>
> Â Â Â Â@ irq priority table (not used)
> diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
> index 78db754..55ebe88 100644
> --- a/arch/arm/plat-mxc/include/mach/hardware.h
> +++ b/arch/arm/plat-mxc/include/mach/hardware.h
> @@ -22,6 +22,10 @@
>
> Â#include <asm/sizes.h>
>
> +#ifdef CONFIG_ARCH_MX5
> +#include <mach/mx51.h>
> +#endif
> +
> Â#ifdef CONFIG_ARCH_MX3
> Â#include <mach/mx3x.h>
> Â#include <mach/mx31.h>
> diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
> index ead9d59..24c066e 100644
> --- a/arch/arm/plat-mxc/include/mach/irqs.h
> +++ b/arch/arm/plat-mxc/include/mach/irqs.h
> @@ -12,9 +12,13 @@
> Â#define __ASM_ARCH_MXC_IRQS_H__
>
> Â/*
> - * So far all i.MX SoCs have 64 internal interrupts
> + * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64
> Â*/
> +#ifdef CONFIG_MXC_TZIC
> +#define MXC_INTERNAL_IRQS Â Â Â128
> +#else
> Â#define MXC_INTERNAL_IRQS Â Â Â64
> +#endif
>
> Â#define MXC_GPIO_IRQ_START Â Â MXC_INTERNAL_IRQS
>
> @@ -26,6 +30,8 @@
> Â#define MXC_GPIO_IRQS Â Â Â Â Â(32 * 3)
> Â#elif defined CONFIG_ARCH_MX25
> Â#define MXC_GPIO_IRQS Â Â Â Â Â(32 * 4)
> +#elif defined CONFIG_ARCH_MX5
> +#define MXC_GPIO_IRQS Â Â Â Â Â(32 * 4)
> Â#elif defined CONFIG_ARCH_MXC91231
> Â#define MXC_GPIO_IRQS Â Â Â Â Â(32 * 4)
> Â#endif
> @@ -46,6 +52,7 @@
> Â#else
> Â#define MX3_IPU_IRQS 0
> Â#endif
> +/* REVISIT: Add IPU irqs on IMX51 */
>
> Â#define NR_IRQS Â Â Â Â Â Â Â Â Â Â Â Â(MXC_IPU_IRQ_START + MX3_IPU_IRQS)
>
> diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
> index d3afafd..e46626e 100644
> --- a/arch/arm/plat-mxc/include/mach/memory.h
> +++ b/arch/arm/plat-mxc/include/mach/memory.h
> @@ -27,6 +27,9 @@
> Â#elif defined CONFIG_ARCH_MXC91231
> Â#define PHYS_OFFSET Â Â Â Â Â ÂUL(0x90000000)
> Â#endif
> +#ifdef CONFIG_ARCH_MX5
> +#define PHYS_OFFSET Â Â Â Â Â Â UL(0x90000000)
> +#endif
>
> Â#if defined(CONFIG_MX1_VIDEO)
> Â/*
> diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
> index 5199053..555e5f8 100644
> --- a/arch/arm/plat-mxc/include/mach/mxc.h
> +++ b/arch/arm/plat-mxc/include/mach/mxc.h
> @@ -30,6 +30,7 @@
> Â#define MXC_CPU_MX27 Â Â Â Â Â 27
> Â#define MXC_CPU_MX31 Â Â Â Â Â 31
> Â#define MXC_CPU_MX35 Â Â Â Â Â 35
> +#define MXC_CPU_MX51 Â Â Â Â Â 51
> Â#define MXC_CPU_MXC91231 Â Â Â 91231
>
> Â#ifndef __ASSEMBLY__
> @@ -108,6 +109,18 @@ extern unsigned int __mxc_cpu_type;
> Â# define cpu_is_mx35() Â Â Â Â (0)
> Â#endif
>
> +#ifdef CONFIG_ARCH_MX5
> +# ifdef mxc_cpu_type
> +# Âundef mxc_cpu_type
> +# Âdefine mxc_cpu_type __mxc_cpu_type
> +# else
> +# Âdefine mxc_cpu_type MXC_CPU_MX51
> +# endif
> +# define cpu_is_mx51() Â Â Â Â (mxc_cpu_type == MXC_CPU_MX51)
> +#else
> +# define cpu_is_mx51() Â Â Â Â (0)
> +#endif
> +
> Â#ifdef CONFIG_ARCH_MXC91231
> Â# ifdef mxc_cpu_type
> Â# Âundef mxc_cpu_type
> diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
> index 527a6c2..024416e 100644
> --- a/arch/arm/plat-mxc/include/mach/timex.h
> +++ b/arch/arm/plat-mxc/include/mach/timex.h
> @@ -28,6 +28,8 @@
> Â#define CLOCK_TICK_RATE Â Â Â Â Â Â Â Â16625000
> Â#elif defined CONFIG_ARCH_MX25
> Â#define CLOCK_TICK_RATE Â Â Â Â Â Â Â Â16000000
> +#elif defined CONFIG_ARCH_MX5
> +#define CLOCK_TICK_RATE Â Â Â Â Â Â Â Â8000000
> Â#elif defined CONFIG_ARCH_MXC91231
> Â#define CLOCK_TICK_RATE Â Â Â Â Â Â Â Â13000000
> Â#endif
> diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
> index 7d6499e..2ba8b29 100644
> --- a/arch/arm/plat-mxc/time.c
> +++ b/arch/arm/plat-mxc/time.c
> @@ -32,7 +32,7 @@
>
> Â/* defines common for all i.MX */
> Â#define MXC_TCTL Â Â Â Â Â Â Â 0x00
> -#define MXC_TCTL_TEN Â Â Â Â Â (1 << 0)
> +#define MXC_TCTL_TEN Â Â Â Â Â (1 << 0) /* Enable module */
> Â#define MXC_TPRER Â Â Â Â Â Â Â0x04
>
> Â/* MX1, MX21, MX27 */
> @@ -48,7 +48,7 @@
> Â#define MX2_TSTAT_COMP Â Â Â Â (1 << 0)
>
> Â/* MX31, MX35, MX25, MXC91231 */
> -#define MX3_TCTL_WAITEN Â Â Â Â Â Â Â Â(1 << 3)
> +#define MX3_TCTL_WAITEN Â Â Â Â Â Â Â Â(1 << 3) /* Wait enable mode */
> Â#define MX3_TCTL_CLK_IPG Â Â Â (1 << 6)
> Â#define MX3_TCTL_FRR Â Â Â Â Â (1 << 9)
> Â#define MX3_IR Â Â Â Â Â Â Â Â 0x0c
> @@ -58,7 +58,7 @@
> Â#define MX3_TCMP Â Â Â Â Â Â Â 0x10
>
> Â#define timer_is_v1() Â(cpu_is_mx1() || cpu_is_mx27())
> -#define timer_is_v2() Â(cpu_is_mx3() || cpu_is_mx25())
> +#define timer_is_v2() Â(cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51())
>
> Âstatic struct clock_event_device clockevent_mxc;
> Âstatic enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
> --
> 1.6.3.3
>
>
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> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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Next message: Balbir Singh: "Re: [PATCH mmotm] memcg: use generic percpu instead of privateimplementation"
Previous message: Eric Miao: "Re: [PATCHv2 03/11] mxc: Fix Drive Strength Field in the IOMUX controller"
In reply to: Rabin Vincent: "Re: [PATCHv2 05/11] mxc: Core support for i.MX5 series ofprocessors from Freescale"
Next in thread: Sascha Hauer: "Re: [PATCHv2 04/11] mxc: changes to common plat-mxc code to addsupport for i.MX5"
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