RE: [PATCH] mtd:nand:clk: preparation for switch to common clockframework

[Karicheri, Muralidharan]

Mike,

How do these patch get to upstream? Does this get merged through davinci maintainer or through individual subsystem maintainers? 

Thanks.

Murali Karicheri
Software Design Engineer


>> -----Original Message-----
>> From: Mike Turquette [mailto:mturquette@xxxxxxxxxx]
>> Sent: Friday, September 07, 2012 5:29 PM
>> To: Karicheri, Muralidharan; dwmw2@xxxxxxxxxxxxx; artem.bityutskiy@xxxxxxxxxxxxxxx;
>> dbaryshkov@xxxxxxxxx; computersforpeace@xxxxxxxxx; linux-mtd@xxxxxxxxxxxxxxxxxxx;
>> linux-kernel@xxxxxxxxxxxxxxx
>> Cc: Karicheri, Muralidharan
>> Subject: Re: [PATCH] mtd:nand:clk: preparation for switch to common clock framework
>> 
>> Quoting Murali Karicheri (2012-08-30 11:17:04)
>> > As a first step towards migrating davinci platforms to use common clock
>> > framework, replace all instances of clk_enable() with clk_prepare_enable()
>> > and clk_disable() with clk_disable_unprepare(). Until the platform is
>> > switched to use the CONFIG_HAVE_CLK_PREPARE Kconfig variable, this just
>> > adds a might_sleep() call and would work without any issues.
>> >
>> > This will make it easy later to switch to common clk based implementation
>> > of clk driver from DaVinci specific driver.
>> >
>> > Signed-off-by: Murali Karicheri <m-karicheri2@xxxxxx>
>> 
>> Acked-by: Mike Turquette <mturquette@xxxxxxxxxx>
>> 
>> > ---
>> >  drivers/mtd/nand/davinci_nand.c |    6 +++---
>> >  1 file changed, 3 insertions(+), 3 deletions(-)
>> >
>> > diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
>> > index d94b03c..6b8cf27 100644
>> > --- a/drivers/mtd/nand/davinci_nand.c
>> > +++ b/drivers/mtd/nand/davinci_nand.c
>> > @@ -656,7 +656,7 @@ static int __init nand_davinci_probe(struct platform_device
>> *pdev)
>> >                 goto err_clk;
>> >         }
>> >
>> > -       ret = clk_enable(info->clk);
>> > +       ret = clk_prepare_enable(info->clk);
>> >         if (ret < 0) {
>> >                 dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n",
>> >                         ret);
>> > @@ -767,7 +767,7 @@ syndrome_done:
>> >
>> >  err_scan:
>> >  err_timing:
>> > -       clk_disable(info->clk);
>> > +       clk_disable_unprepare(info->clk);
>> >
>> >  err_clk_enable:
>> >         clk_put(info->clk);
>> > @@ -804,7 +804,7 @@ static int __exit nand_davinci_remove(struct platform_device
>> *pdev)
>> >
>> >         nand_release(&info->mtd);
>> >
>> > -       clk_disable(info->clk);
>> > +       clk_disable_unprepare(info->clk);
>> >         clk_put(info->clk);
>> >
>> >         kfree(info);
>> > --
>> > 1.7.9.5
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