Re: [PATCH 2/2 V5] iommu/amd: Add logic to decode AMD IOMMU eventflag

[Suravee Suthikulanit]

On 4/10/2013 11:21 AM, Shuah Khan wrote:
> Good feature. Do you also plan to add decode logic for these flags.
> For example, RZ is only meaningful when PR=1, RW is only meaningful
> when
> PR=1, TR=0, and I=0, and so on? This additional logic will be useful.
>
> Reviewed-by: Shuah Khan<shuahkhan@xxxxxxxxx>
>
> -- Shuah
Additional filtering logic can also be added in the future.  This will 
also be important if we are planning on handling IOMMU errors.

Suravee

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