Re: [PATCH v2 0/8] Reorder i.MX IPU display enable/disable sequence

[Russell King - ARM Linux]

On Mon, Apr 14, 2014 at 11:53:15PM +0200, Philipp Zabel wrote:
> Repeatedly enabling and disabling the display currently can lead to a state
> in which the IPU doesn't produce a valid signal anymore because we disable
> IPU submodules before they can finish their interaction.
> 
> This series reorders the enable/disable sequence so that we first wait for the
> DC/DP to finish processing the current frame, then stop the DI and IDMAC, and
> only then disable clocks to the submodules. Also from now on we really disable
> the DC when it is not in use.

Okay, I'm going to queue these up in a couple of days, but there's
something which I'd prefer to be fixed... there's one in particular
that is excessively long.

> Philipp Zabel (8):
>   imx-drm: ipu-common: add ipu_map_irq to request non-IDMAC interrupts
>   imx-drm: ipu-common: Add helpers to check for a busy IDMAC channel and
>     to busywait for an interrupt
>   imx-drm: ipu-dmfc: Wait for FIFOs to run empty before disabling
>   imx-drm: ipu-dc: Wait for DC_FC_1 / DP_SF_END interrupt
>   imx-drm: ipu-dp: Split disabling the DP foreground channel from
>     disabling the DP module
>   imx-drm: imx-dp: When disabling the DP foreground channel, wait until
>     the DP background channel is finished before disabling the IDMAC
>     channel

    imx-drm: imx-dp: disable DP fg channel after DP bg channel has finished

maybe?

>   imx-drm: ipuv3-crtc: Change display enable/disable order
>   imx-drm: ipu-dc: Disable DC module when not in use


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