Re: [PATCH] perf, x86: Don't mark DataLA addresses as store

[Ingo Molnar]

* Andi Kleen <andi@xxxxxxxxxxxxxx> wrote:

> From: Andi Kleen <ak@xxxxxxxxxxxxxxx>
> 
> Haswell supports reporting the data address for a range
> of events, including UOPS_RETIRED.ALL and some load
> events. Currently these addresses were always marked
> as stores, which is wrong, as they could be loads too.
> Change it to NA instead.
> 
> Signed-off-by: Andi Kleen <ak@xxxxxxxxxxxxxxx>
> ---
>  arch/x86/kernel/cpu/perf_event_intel_ds.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> index ae96cfa..7e9546a 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> @@ -113,7 +113,7 @@ static u64 precise_store_data_hsw(u64 status)
>  	union perf_mem_data_src dse;
>  
>  	dse.val = 0;
> -	dse.mem_op = PERF_MEM_OP_STORE;
> +	dse.mem_op = PERF_MEM_OP_NA;
>  	dse.mem_lvl = PERF_MEM_LVL_NA;
>  	if (status & 1)
>  		dse.mem_lvl = PERF_MEM_LVL_L1;

NAK, this changelog is still deficient for the same reason it was 
deficient a month ago.

Thanks,

	Ingo
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