Re: [PATCH V3 1/3] x86/PCI: Fix PCI root numa_node info on AMD family15h

[Suravee Suthikulanit]

On 5/8/2014 4:01 AM, Robert Richter wrote:
> On 08.05.14 10:59:05, Robert Richter wrote:
> > On 07.05.14 13:58:45, suravee.suthikulpanit@xxxxxxx wrote:
> > > @@ -113,10 +122,17 @@ static int __init early_fill_mp_bus_info(void)
> > >   		info = alloc_pci_root_info(min_bus, max_bus, node, link);
> > >   	}
> > >
> > > +	/*
> > > +	 * The following code is only supported until Fam11h.
> > > +	 * Newer processors will depend on ACPI MCFG table instead.
> > > +	 */
> > > +	if (boot_cpu_data.x86 > 0x11)
> > > +		return 0;
> > > +
> > >   	/* get the default node and link for left over res */
> >
> > As this is the only substantial change of your patch, I would better
> > drop ther rest or at least split it in two patches. Should this change
> > also be for stable?
>
> Of course adding the hostbridge must be also part of the patch, didn't
> note this due to the other noise. See why the split would be good?
>
> > -Robert


Robert,

I have already added the hostbridge for family15h in this patch.

+static struct amd_hostbridge hb_probes[] __initdata = {
+	{ 0, 0x18, 0x1100 }, /* K8 */
+	{ 0, 0x18, 0x1200 }, /* Family10h */
+	{ 0xff, 0, 0x1200 }, /* Family10h */
+	{ 0, 0x18, 0x1300 }, /* Family11h */
+	{ 0, 0x18, 0x1600 }, /* Family15h */ <--- HERE
 };

The rest of the changes are mostly comments, some minor renaming of 
variables for clarity, and replace hardcode values with preprocessor 
macro.  If needed, I can split them.

Suravee
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