[PATCH] openrisc: irq: use irqchip framework

[Stefan Kristiansson]

In addition to consolidating the or1k-pic initialization with
how other interrupt controllers are initialized, this makes
OpenRISC less tied to its on-cpu interrupt controller.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@xxxxxxxxxxxxx>
---
 arch/openrisc/kernel/irq.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/arch/openrisc/kernel/irq.c b/arch/openrisc/kernel/irq.c
index 8ec77bc..f6f4683 100644
--- a/arch/openrisc/kernel/irq.c
+++ b/arch/openrisc/kernel/irq.c
@@ -19,10 +19,13 @@
 #include <linux/of.h>
 #include <linux/ftrace.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/export.h>
 #include <linux/irqdomain.h>
 #include <linux/irqflags.h>
 
+#include "../../drivers/irqchip/irqchip.h"
+
 /* read interrupt enabled status */
 unsigned long arch_local_save_flags(void)
 {
@@ -151,24 +154,22 @@ static const struct irq_domain_ops or1k_irq_domain_ops = {
  * 1000 CPU.  This is the "root" domain as these are the interrupts
  * that directly trigger an exception in the CPU.
  */
-static void __init or1k_irq_init(void)
+static int __init
+or1k_irq_init(struct device_node *intc,  struct device_node *parent)
 {
-	struct device_node *intc = NULL;
-
-	/* The interrupt controller device node is mandatory */
-	intc = of_find_compatible_node(NULL, NULL, "opencores,or1k-pic");
-	BUG_ON(!intc);
-
 	/* Disable all interrupts until explicitly requested */
 	mtspr(SPR_PICMR, (0UL));
 
 	root_domain = irq_domain_add_linear(intc, 32,
 					    &or1k_irq_domain_ops, NULL);
+
+	return 0;
 }
+IRQCHIP_DECLARE(or1k_pic, "opencores,or1k-pic", or1k_irq_init);
 
 void __init init_IRQ(void)
 {
-	or1k_irq_init();
+	irqchip_init();
 }
 
 void __irq_entry do_IRQ(struct pt_regs *regs)
-- 
1.8.3.2

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