Re: Questions About a Semi-Soft irqchip Device

From: Jason Cooper
Date: Tue Jul 08 2014 - 10:56:49 EST


On Tue, Jul 08, 2014 at 09:02:14AM -0500, Jon Loeliger wrote:
> My IP block provides software-assignable interrupts. That
> is, I have a large pool of interrupt sources, and a large pool
> of interrupt bits in the controller, but they are not physically
> tied together. Instead they are assigned by some driver as it
> initializes and allocates resources. This, I think, means that
> I can not describe the interrupt bindings in the DTS file.

Please take a look at the crossbar driver. It's had quite a bit of
cleanup this cycle, so you may way to look at

git:// irqchip/crossbar

It sounds very similar.


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