Re: [PATCH V5 1/2] perf ignore LBR and extra_regs

[Peter Zijlstra]

so once more; and then I'm going to route your emails to /dev/null, wrap
text at 78 chars.

On Mon, Jul 14, 2014 at 02:28:36PM +0000, Liang, Kan wrote:
> > > +++ b/arch/x86/kernel/cpu/perf_event.h
> > > @@ -464,6 +464,12 @@ struct x86_pmu {
> > >  	 */
> > >  	struct extra_reg *extra_regs;
> > >  	unsigned int er_flags;
> > > +	/*
> > > +	 * EXTRA REG MSR can be accessed
> > > +	 * The extra registers are completely unrelated to each other.
> > > +	 * So it needs a flag for each extra register.
> > > +	 */
> > > +	bool		extra_msr_access[EXTRA_REG_MAX];
> > 
> > So why not in struct extra_reg again? You didn't give a straight answer there.
> 
> I think I did in the email.
> You mentioned that there's still (only) 4 empty bytes at the tail of
> extra_reg itself.  However, the extra_reg_type may be extended in the
> near future.  So that may not be a reason to move to extra_reg.

Well, you can always grow. Also be explicit, 'may be' is an empty
statement.

> Furthermore, if we move extra_msr_access to extra_reg, I guess we have
> to modify all the related micros (i.e EVENT_EXTRA_REG) to initialize
> the new items.  That could be a big change.

Nah, trivial stuff :-)

> On the other side, in x86_pmu structure, there are extra_regs related
> items defined under the comments "Extra registers for events".  And
> the bit holes are enough for current usage and future extension.
> 
> So I guess  x86_pmu should be a good place to store the availability
> of the reg.

It just doesn't make sense to me to have multiple arrays of the same
thing.

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