Re: [RESEND PATCH 2/2] ARM: dts: Add tps65090 FET constraints on Peach Pit and Pi

[Mark Brown]

On Mon, Aug 11, 2014 at 08:57:24AM -0700, Doug Anderson wrote:
> On Mon, Aug 11, 2014 at 4:38 AM, Javier Martinez Canillas

> > After the switch is turned on, a safety timer is started
> > and before this timer times out the output voltage must
> > have reached the input voltage. Otherwise the switch is
> > turned off expecting an overload condition.

> > So using the maximum output voltage slew rate and the timer
> > minimum and maximum timeouts, a voltage constraints can be
> > expressed as bounded limits for the timeout. That is what
> > is used in the board schematics and should be in the DT too.

> I don't understand this, but if you and Mark are happy with it...

I have not looked at this change to my knowledge.

> ...I'm also not 100% certain what the above description has to do with
> this change, but I'll admit to having only skimmed some of the earlier
> conversations.

It's not at all clear to me either looking at the quoted section.

Attachment: signature.asc
Description: Digital signature