[PATCH v2] Staging: dgnc: Fix long line coding style issues in dgnc_cls.h

From: Sean Cleator
Date: Wed Dec 03 2014 - 16:33:51 EST


A patch to fix the rest of the long line warnings in the dgnc_cls.h file
found by the checkpatch.pl tool

Signed-off-by: Sean Cleator <seancleator@xxxxxxxxxxxxx>
---
drivers/staging/dgnc/dgnc_cls.h | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/dgnc/dgnc_cls.h b/drivers/staging/dgnc/dgnc_cls.h
index 465d79a..ee7814b 100644
--- a/drivers/staging/dgnc/dgnc_cls.h
+++ b/drivers/staging/dgnc/dgnc_cls.h
@@ -36,9 +36,12 @@
************************************************************************/

struct cls_uart_struct {
- u8 txrx; /* WR RHR/THR - Holding Reg */
+ u8 txrx; /* WR RHR/THR - Holding Reg */
u8 ier; /* WR IER - Interrupt Enable Reg */
- u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
+ u8 isr_fcr; /*
+ * WR ISR/FCR - Interrupt Status Reg/Fifo
+ * Control Reg
+ */
u8 lcr; /* WR LCR - Line Control Reg */
u8 mcr; /* WR MCR - Modem Control Reg */
u8 lsr; /* WR LSR - Line Status Reg */
@@ -61,8 +64,9 @@ struct cls_uart_struct {
#define UART_16654_FCR_RXTRIGGER_56 0x80
#define UART_16654_FCR_RXTRIGGER_60 0xC0

-#define UART_IIR_CTSRTS 0x20 /* Received CTS/RTS change of state */
-#define UART_IIR_RDI_TIMEOUT 0x0C /* Receiver data TIMEOUT */
+/* Received CTS/RTS change of state */
+#define UART_IIR_CTSRTS 0x20
+#define UART_IIR_RDI_TIMEOUT 0x0C /* Receiver data TIMEOUT */

/*
* These are the EXTENDED definitions for the Exar 654's Interrupt
@@ -74,8 +78,10 @@ struct cls_uart_struct {
#define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */
#define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */

-#define UART_EXAR654_XOFF_DETECT 0x1 /* Indicates whether chip saw an incoming XOFF char */
-#define UART_EXAR654_XON_DETECT 0x2 /* Indicates whether chip saw an incoming XON char */
+/* Indicates whether chip saw an incoming XOFF char */
+#define UART_EXAR654_XOFF_DETECT 0x1
+/* Indicates whether chip saw an incoming XON char */
+#define UART_EXAR654_XON_DETECT 0x2

#define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */
#define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */
--
2.1.3

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