RE: [PATCH V2 1/1] X86: hyperv: Enable MSR based APIC access

[KY Srinivasan]

> -----Original Message-----
> From: Ingo Molnar [mailto:mingo.kernel.org@xxxxxxxxx] On Behalf Of Ingo
> Molnar
> Sent: Wednesday, March 25, 2015 5:15 AM
> To: KY Srinivasan
> Cc: x86@xxxxxxxxxx; gregkh@xxxxxxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; devel@xxxxxxxxxxxxxxxxxxxxxx; olaf@xxxxxxxxx;
> apw@xxxxxxxxxxxxx; jasowang@xxxxxxxxxx; tglx@xxxxxxxxxxxxx;
> hpa@xxxxxxxxx
> Subject: Re: [PATCH V2 1/1] X86: hyperv: Enable MSR based APIC access
> 
> 
> * K. Y. Srinivasan <kys@xxxxxxxxxxxxx> wrote:
> 
> > If the hypervisor supports MSR based access to the APIC registers
> > (EOI, TPR and ICR), implement the MSR based access.
> >
> > Signed-off-by: K. Y. Srinivasan <kys@xxxxxxxxxxxxx>
> > ---
> >  Changes from V1: Addressed comments from Ingo Molnar
> <mingo.kernel.org@xxxxxxxxx>
> 
> You didn't address my primary feedback:
> 
> > > So since we are trying to explain things, wouldn't this comment be
> > > more informative if it explained why we are trying to use the
> > > x2APIC facilities of Hyper-V?

Ingo,

I added the code for advertising support for x2APIC since I saw the feature flag in
the public documentation of Hyper-V. Subsequently, when I checked with the Hyper-V
developers, I learned that Hyper-V does not support x2APIC for guests. So, I got rid
of the code that checked for this flag as that would be dead code.  
> > >
> > > I.e. what are the benefits of using the x2apic API towards the
> > > hypervisor?
> 
> please explain the purpose, context and benefits, not just what the
> patch does - even if the comment from your first patch is now gone.

The MSR based access can be a little more efficient than the mmio based access
to the select APIC registers. That is the intent of this patch. Do you want me to resubmit
the patch with these additional details.

Regards,

K. Y
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