Re: [PATCH V6 15/25] MIPS: BMIPS: Flush the readahead cache after DMA
From: Kevin Cernekee
Date: Wed Mar 25 2015 - 13:09:15 EST
On Wed, Mar 25, 2015 at 2:23 AM, Ralf Baechle <ralf@xxxxxxxxxxxxxx> wrote:
> On Thu, Dec 25, 2014 at 09:49:10AM -0800, Kevin Cernekee wrote:
>
>> BMIPS 3300/435x/438x CPUs have a readahead cache that is separate from
>> the L1/L2. During a DMA operation, accesses adjacent to a DMA buffer
>> may cause parts of the DMA buffer to be prefetched into the RAC. To
>> avoid possible coherency problems, flush the RAC upon DMA completion.
>>
>> Signed-off-by: Kevin Cernekee <cernekee@xxxxxxxxx>
>> Signed-off-by: Jaedon Shin <jaedon.shin@xxxxxxxxx>
>> ---
>> arch/mips/mm/dma-default.c | 15 +++++++++++++++
>> 1 file changed, 15 insertions(+)
>>
>> diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
>> index af5f046..38ee47a 100644
>> --- a/arch/mips/mm/dma-default.c
>> +++ b/arch/mips/mm/dma-default.c
>> @@ -18,6 +18,7 @@
>> #include <linux/highmem.h>
>> #include <linux/dma-contiguous.h>
>>
>> +#include <asm/bmips.h>
>> #include <asm/cache.h>
>> #include <asm/cpu-type.h>
>> #include <asm/io.h>
>
> Aside of platform-specific headers having no business of getting
> included directly in a generic arch file
<asm/bmips.h> covers all BMIPS CPUs across multiple platforms.
The intention was to add code needed to support BMIPS CPUs into a
central place, rather than duplicating it in the platform code for
each of the BMIPS-based systems: arch/mips/{bcm63xx,bmips,brcmstb}.
> this also breaks the build
> of many platforms:
>
> CC arch/mips/mm/dma-default.o
> In file included from arch/mips/mm/dma-default.c:21:0:
> ./arch/mips/include/asm/bmips.h: In function âbmips_read_zscm_regâ:
> ./arch/mips/include/asm/bmips.h:97:160: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
> cache_op(Index_Load_Tag_S, ZSCM_REG_BASE + offset);
> ^
> ./arch/mips/include/asm/bmips.h: In function âbmips_write_zscm_regâ:
> ./arch/mips/include/asm/bmips.h:118:160: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
> cache_op(Index_Store_Tag_S, ZSCM_REG_BASE + offset);
>
> I think the broken platforms are all the 64 bit platforms.
Hmm, looks like I might need to use 0x97000000UL for ZSCM_REG_BASE.
If this fixes the build should I resubmit, or do you really want the
BMIPS flush code moved into another file?
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/