RE: [PATCH V5 4/6] perf, x86: handle multiple records in PEBS buffer

[Liang, Kan]

> > One corner case needs to mention is that the PEBS hardware doesn't
> > deal well with collisions, when PEBS events happen near to each other.
> > The records for the events can be collapsed into a single one, and
> > it's not possible to reconstruct all events that caused the PEBS
> > record, However in practice collisions are extremely rare, as long as
> > different events are used. The periods are typically very large, so
> > any collision is unlikely. When collision happens, we drop the PEBS
> > record.
> >
> > Here are some numbers about collisions.
> > Four frequently occurring events
> > (cycles:p,instructions:p,branches:p,mem-stores:p) are tested
> >
> > Test events which are sampled together                   collision rate
> > cycles:p,instructions:p                                  0.25%
> > cycles:p,instructions:p,branches:p                       0.30%
> > cycles:p,instructions:p,branches:p,mem-stores:p          0.35%
> >
> > cycles:p,cycles:p                                        98.52%
> >
> > collisions are extremely rare as long as different events are used.
> > The only way you can get a lot of collision is when you count the same
> > thing multiple times. But it is not a useful configuration.
> 
> This fails to mention the other problem the status field has.  You also did
> not specify what exact condition you counted as a collision.
> 
> The PEBS status field is a copy of the GLOBAL_STATUS MSR at assist time,
> this means that:
> 
>  - its possible (and harmless) for the status field to contain set bits
>    for !PEBS events -- the proposed code is buggy here.
I will fix it.
>  - its possible to have multiple PEBS bits set even though the event
>    really only was for a single event -- if you count everything with
>    multiple PEBS bits set as a collision you're counting wrong.
> 

In what situation multiple PEBS bits was set for a single event?
Could you please give me an example?

Thanks,
Kan

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