RE: [PATCH V6 4/6] perf, x86: handle multiple records in PEBS buffer

[Liang, Kan]

> >
> >  A) the CTRn value reaches 0:
> >     - the corresponding bit in GLOBAL_STATUS gets set
> >     - we start arming the hardware assist
> >
> >     < some unspecified amount of time later --
> >         this could cover multiple events of interest >
> >
> >  B) the hardware assist is armed, any next event will trigger it
> >
> >  C) a matching event happens:
> >     - the hardware assist triggers and generates a PEBS record
> >       this includes a copy of GLOBAL_STATUS at this moment
> >     - if we auto-reload we (re)set CTRn
> 
> Is this actually true? Do we reload here or on A ?
> 

Yes, on C.
According to SDM Volume 3, 18.7.1.1, the reset value will be
loaded after each PEBS record is written, which is done
by hw assist.


> >     - we clear the relevant bit in GLOBAL_STATUS
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