Re: [PATCH v5 18/21] clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate

[Benson Leung]

On Tue, May 12, 2015 at 10:24 AM, Rhyland Klein <rklein@xxxxxxxxxx> wrote:
> This removes the conversion from pdiv to hw, which is already taken
> care of by _get_table_rate before this code is run. This avoids
> incorrectly converting pdiv to hw twice and getting the wrong hw value.
>
> Also set the input_rate in the freq cfg in _calc_dynamic_ramp_rate while
> setting all the other fields.
>
> Signed-off-by: Rhyland Klein <rklein@xxxxxxxxxx>


Reviewed-by: Benson Leung <bleung@xxxxxxxxxxxx>

-- 
Benson Leung
Software Engineer, Chrom* OS
bleung@xxxxxxxxxxxx
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/