Re: [PATCH-v6 5/6] mfd: 88pm800: Set default interrupt clear method
From: Lee Jones
Date: Mon Aug 24 2015 - 09:54:29 EST
On Wed, 08 Jul 2015, Vaibhav Hiremath wrote:
> As per the spec, bit 1 (INT_CLEAR_MODE) of reg addr 0xe
> (page 0) controls the method of clearing interrupt
> status of 88pm800 family of devices;
>
> 0: clear on read
> 1: clear on write
>
> If pdata is not coming from board file, then set the
> default irq clear method to "irq clear on write"
>
> Also, as suggested by "Lee Jones" renaming variable field
> to appropriate name and removed unnecessary field
> pm80x_chip.irq_mode, using platform_data.irq_clr_method.
>
> Signed-off-by: Zhao Ye <zhaoy@xxxxxxxxxxx>
> Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@xxxxxxxxxx>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@xxxxxxxxxxx>
> ---
> drivers/mfd/88pm800.c | 15 ++++++++++-----
> include/linux/mfd/88pm80x.h | 9 +++++++--
> 2 files changed, 17 insertions(+), 7 deletions(-)
[...]
> +#define PM800_WAKEUP2_INT_READ_CLEAR (0 << 1)
> +#define PM800_WAKEUP2_INT_WRITE_CLEAR (1 << 1)
Use BIT().
> +/* Used by irq_clr_method */
> +#define PM800_IRQ_CLR_ON_READ 0
> +#define PM800_IRQ_CLR_ON_WRITE 1
> - int irq_mode; /* Clear interrupt by read/write(0/1) */
> + bool irq_clr_method; /* Clear interrupt by read/write(0/1) */
> + irq_clr_mode = pdata->irq_clr_method == PM800_IRQ_CLR_ON_WRITE ?
> + PM800_WAKEUP2_INT_WRITE_CLEAR : PM800_WAKEUP2_INT_READ_CLEAR;
> + ret = regmap_update_bits(map, PM800_WAKEUP2, mask, irq_clr_mode);
This is pretty convoluted.
For starters you're abusing the 'bool' type here. Bool is either
'true' or 'false', so at the very least you should rename
'irq_clr_method' to 'irq_clr_on_write'.
Then you can do:
irq_clr_mode = pdata->irq_clr_on_write ?
PM800_WAKEUP2_INT_WRITE_CLEAR : PM800_WAKEUP2_INT_READ_CLEAR;
However, what I suggest you really do is share
PM800_WAKEUP2_INT_{READ,WRITE}_CLEAR with platform data and just pass
the value through directly.
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org â Open source software for ARM SoCs
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