On Fri, Aug 21, 2015 at 01:12:23AM +0200, Daniel Lezcano wrote:
On 08/20/2015 10:06 AM, Sascha Hauer wrote:
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
[ ... ]
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
new file mode 100644
index 0000000..06d52ef
--- /dev/null
+++ b/drivers/thermal/mtk_thermal.c
@@ -0,0 +1,582 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
2015 ?
Can change to 2015
+ * Author: Hanyi.Wu <hanyi.wu@xxxxxxxxxxxx>
Hanyi Wu ?
It's the original author of this code.
+#define TEMP_MONINT_COLD(sp) (BIT(0) << ((sp) * 5))
+#define TEMP_MONINT_HOT(sp) (BIT(1) << ((sp) * 5))
+#define TEMP_MONINT_LOW_OFS(sp) (BIT(2) << ((sp) * 5))
+#define TEMP_MONINT_HIGH_OFS(sp) (BIT(3) << ((sp) * 5))
+#define TEMP_MONINT_HOT_TO_NORM(sp) (BIT(4) << ((sp) * 5))
+#define TEMP_MONINT_TIMEOUT BIT(15)
+#define TEMP_MONINT_IMMEDIATE_SENSE(sp) BIT(16 + (sp))
+#define TEMP_MONINT_FILTER_SENSE(sp) BIT(19 + (sp))
+#define TEMP_ADCWRITECTRL_ADC_EXTRA_WRITE BIT(2)
+#define TEMP_ADCWRITECTRL_ADC_EXTRA1_WRITE BIT(3)
+#define TEMP_PROTCTL_AVERAGE (0 << 16)
+#define TEMP_PROTCTL_MAXIMUM (1 << 16)
+#define TEMP_PROTCTL_SELECTED (2 << 16)
<-- Not used.
Will remove.
Sascha