Re: [RFC PATCH] x86/cpu: Fix MSR value truncation issue
From: Borislav Petkov
Date: Wed Nov 11 2015 - 11:05:23 EST
On Wed, Nov 11, 2015 at 07:50:04AM -0800, Andy Lutomirski wrote:
> Not terribly surprising :) Someone (I forget who) told me that 32-bit
> SYSCALL (native 32-bit, not compat) was so full of errata that it was
> unusable. Even without errata, I don't really see how it would work
No, showstopper appears much earlier: it is only supported on AMD. Which
would mean, yet another vendor special-handling. And I don't think it's
Yeah, yeah, it might still be faster than SYSENTER, but 32-bit?! Srsly?!
I'm surprised that thing still builds even. :-)
> -- there's no MSR_SYSCALL_MASK,
Of course there is:
MSRC000_0084 SYSCALL Flag Mask (SYSCALL_FLAG_MASK):
31:0 - Mask: SYSCALL flag mask. Read-write. Reset: 0000_0000h. This register holds the EFLAGS
mask used by the SYSCALL instruction. 1=Clear the corresponding EFLAGS bit when executing the
Intel has that too, except again, no SYSCALL in legacy mode on Intel.
ECO tip #101: Trim your mails when you reply.
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/