Re: [RFC PATCH] x86/cpu: Fix MSR value truncation issue

From: Brian Gerst
Date: Wed Nov 11 2015 - 13:08:04 EST

On Wed, Nov 11, 2015 at 11:05 AM, Borislav Petkov <bp@xxxxxxxxx> wrote:
> On Wed, Nov 11, 2015 at 07:50:04AM -0800, Andy Lutomirski wrote:
>> Not terribly surprising :) Someone (I forget who) told me that 32-bit
>> SYSCALL (native 32-bit, not compat) was so full of errata that it was
>> unusable. Even without errata, I don't really see how it would work
>> well

I had tried to implement it when the K6 came out, but the major
problem was that implementation set an internal flag that forced
return to userspace with SYSRET. IRET would fault, which made task
switching a big problem.

Specifically, the SYSCALL description for the K6 has this text:
"The CS and SS registers should not be modified by the operating
system between the
execution of the SYSCALL instruction and its corresponding SYSRET instruction."

It's likely that behavior has been fixed on modern 64-bit AMD cpus
running in legacy mode, but I haven't tested it. It's not really
worth pursuing.

> No, showstopper appears much earlier: it is only supported on AMD. Which
> would mean, yet another vendor special-handling. And I don't think it's
> worth it.
> Yeah, yeah, it might still be faster than SYSENTER, but 32-bit?! Srsly?!
> I'm surprised that thing still builds even. :-)
>> -- there's no MSR_SYSCALL_MASK,
> Of course there is:
> 31:0 - Mask: SYSCALL flag mask. Read-write. Reset: 0000_0000h. This register holds the EFLAGS
> mask used by the SYSCALL instruction. 1=Clear the corresponding EFLAGS bit when executing the
> SYSCALL instruction.
> Intel has that too, except again, no SYSCALL in legacy mode on Intel.

SYSCALL_FLAG_MASK was added with the 64-bit processors. It's not used
in legacy mode according to the AMD docs.

Brian Gerst
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