Re: [PATCH v2 03/19] ARM: dts: Add DMC bus node for Exynos3250

[Krzysztof Kozlowski]

On 09.12.2015 13:07, Chanwoo Choi wrote:
> This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC.
> The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard
> SDRAM devices. The bus includes the OPP tables and the source clock for DMC
> block.
> 
> Following list specifies the detailed relation between the clock and DMC block:
> - The source clock of DMC block : div_dmc
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
> ---
>  arch/arm/boot/dts/exynos3250.dtsi | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> index 2f30d632f1cc..7214c5e42150 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -687,6 +687,40 @@
>  			clock-names = "ppmu";
>  			status = "disabled";
>  		};
> +
> +		bus_dmc: bus_dmc {
> +			compatible = "samsung,exynos-bus";
> +			clocks = <&cmu_dmc CLK_DIV_DMC>;
> +			clock-names = "bus";
> +			operating-points-v2 = <&bus_dmc_opp_table>;
> +			status = "disabled";
> +		};
> +
> +		bus_dmc_opp_table: opp_table1 {

This is the firsy opp_table, right? So:
s/opp_table1/opp_table0/

> +			compatible = "operating-points-v2";
> +			opp-shared;
> +
> +			opp00 {
> +				opp-hz = /bits/ 64 <50000000>;
> +				opp-microvolt = <800000>;
> +			};
> +			opp01 {
> +				opp-hz = /bits/ 64 <100000000>;
> +				opp-microvolt = <800000>;
> +			};
> +			opp02 {
> +				opp-hz = /bits/ 64 <134000000>;
> +				opp-microvolt = <800000>;

Why 134, not 133 MHz?

> +			};
> +			opp03 {
> +				opp-hz = /bits/ 64 <200000000>;
> +				opp-microvolt = <800000>;

Shouldn't this be 825 mV, not 800? I think we used previously that value
for our devices.

Best regards,
Krzysztof


> +			};
> +			opp04 {
> +				opp-hz = /bits/ 64 <400000000>;
> +				opp-microvolt = <875000>;
> +			};
> +		};
>  	};
>  };
>  
> 

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