Re: [PATCH v3 14/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4x12

[Krzysztof Kozlowski]

On 11.12.2015 14:07, Chanwoo Choi wrote:
> This patch adds the bus noes using VDD_MIF for Exynos4x12 SoC.

"noes", pointed at v2.

> Exynos4x12 has the following AXI buses to translate data
> between DRAM and DMC/ACP/C2C.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
> [linux.amoon: Tested on Odroid U3]
> Tested-by: Anand Moon <linux.amoon@xxxxxxxxx>
> ---
>  arch/arm/boot/dts/exynos4x12.dtsi | 68 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 68 insertions(+)

The code itself:
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@xxxxxxxxxxx>

Best regards,
Krzysztof


> diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
> index 84a23f962946..99a0f4ca3d47 100644
> --- a/arch/arm/boot/dts/exynos4x12.dtsi
> +++ b/arch/arm/boot/dts/exynos4x12.dtsi
> @@ -281,6 +281,74 @@
>  		clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>;
>  		#iommu-cells = <0>;
>  	};
> +
> +	bus_dmc: bus_dmc {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&clock CLK_DIV_DMC>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_dmc_opp_table>;
> +		status = "disabled";
> +	};
> +
> +	bus_acp: bus_acp {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&clock CLK_DIV_ACP>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_acp_opp_table>;
> +		status = "disabled";
> +	};
> +
> +	bus_c2c: bus_c2c {
> +		compatible = "samsung,exynos-bus";
> +		clocks = <&clock CLK_DIV_C2C>;
> +		clock-names = "bus";
> +		operating-points-v2 = <&bus_dmc_opp_table>;
> +		status = "disabled";
> +	};
> +
> +	bus_dmc_opp_table: opp_table1 {
> +		compatible = "operating-points-v2";
> +		opp-shared;
> +
> +		opp@100000000 {
> +			opp-hz = /bits/ 64 <100000000>;
> +			opp-microvolt = <900000>;
> +		};
> +		opp@134000000 {
> +			opp-hz = /bits/ 64 <134000000>;
> +			opp-microvolt = <900000>;
> +		};
> +		opp@160000000 {
> +			opp-hz = /bits/ 64 <160000000>;
> +			opp-microvolt = <900000>;
> +		};
> +		opp@267000000 {
> +			opp-hz = /bits/ 64 <267000000>;
> +			opp-microvolt = <950000>;
> +		};
> +		opp@400000000 {
> +			opp-hz = /bits/ 64 <400000000>;
> +			opp-microvolt = <1050000>;
> +		};
> +	};
> +
> +	bus_acp_opp_table: opp_table2 {
> +		compatible = "operating-points-v2";
> +		opp-shared;
> +
> +		opp@100000000 {
> +			opp-hz = /bits/ 64 <100000000>;
> +		};
> +		opp@134000000 {
> +			opp-hz = /bits/ 64 <134000000>;
> +		};
> +		opp@160000000 {
> +			opp-hz = /bits/ 64 <160000000>;
> +		};
> +		opp@267000000 {
> +			opp-hz = /bits/ 64 <267000000>;
> +		};
> +	};
>  };
>  
>  &combiner {
> 

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