[PATCH v1 0/3] ARM64 LPC: legacy ISA I/O support

[Rongrong Zou]

The Low Pin Count bus, is used on IBM-compatible personal computers 
to connect low-bandwidth devices to the CPU, such as the boot ROM, 
"legacy" I/O devices (integrated into a super I/O chip), and Trusted
Platform Module (TPM)."Legacy" I/O devices usually include serial and 
parallel ports, PS/2 keyboard, PS/2 mouse, and floppy disk controller.

Usually LPC controller is part of PCI host bridge, so the legacy ISA
port locate on LPC bus can be accessed directly. But some SoC have
independent LPC controller, and we can access the legacy port by specifying
LPC address cycle. Thus, LPC driver is introduced.

In addition, indirect legacy ISA port I/O is introduced, then we can
hook LPC driver to gereral inb/outb inerface. So the driver of device
attached to the LPC bus need no modification.

Generally, X86 server platform is managemented by BMC, The host 
communicate with the BMC across IPMI(BT/KCS). BT(KCS) use the
legacy ISA port which is located on LPC bus. 

The BMC is required on Hisilicon Hip06 arm64 SoC board too.  

  ____     lpc     ____
 |host|___________|BMC |
 |____|           |____|

Rongrong Zou (3):
  ARM64 LPC: indirect ISA PORT IO introduced
  ARM64 LPC: LPC driver implementation
  ARM64 LPC: update binding doc

 .../devicetree/bindings/arm64/low-pin-count.txt    |  20 ++
 arch/arm64/Kconfig.platforms                       |   5 +-
 arch/arm64/include/asm/io.h                        |  78 ++++++
 arch/arm64/kernel/Makefile                         |   1 +
 arch/arm64/kernel/lpc.c                            | 294 +++++++++++++++++++++
 arch/arm64/kernel/setup.c                          |   5 +
 6 files changed, 402 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/arm64/low-pin-count.txt
 create mode 100644 arch/arm64/kernel/lpc.c

-- 
1.9.1

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