[PATCH v2 0/3] x86/mm: INVPCID support

From: Andy Lutomirski
Date: Mon Jan 25 2016 - 13:37:57 EST

Ingo, before applying this, please apply these two KASAN fixes:


Without those fixes, this series will trigger a KASAN bug.

This is a straightforward speedup on Ivy Bridge and newer, IIRC.
(I tested on Skylake. INVPCID is not available on Sandy Bridge.
I don't have Ivy Bridge, Haswell or Broadwell to test on, so I
could be wrong as to when the feature was introduced.)

I think we should consider these patches separately from the rest
of the PCID stuff -- they barely interact, and this part is much
simpler and is useful on its own.

This is exactly identical to patches 2-4 of the PCID RFC series.

Andy Lutomirski (3):
x86/mm: Add INVPCID helpers
x86/mm: Add a noinvpcid option to turn off INVPCID
x86/mm: If INVPCID is available, use it to flush global mappings

Documentation/kernel-parameters.txt | 2 ++
arch/x86/include/asm/tlbflush.h | 50 +++++++++++++++++++++++++++++++++++++
arch/x86/kernel/cpu/common.c | 16 ++++++++++++
3 files changed, 68 insertions(+)