Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP

[Arnd Bergmann]

On Monday 08 February 2016 10:11:38 Antoine Tenart wrote:
> index 000000000000..3e3080fa45e4
> --- /dev/null
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> +	model = "Annapurna Labs Alpine v2";
> +	compatible = "al,alpine-v2";
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	aliases {
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +		serial2 = &uart2;
> +		serial3 = &uart3;
> +	};

Move the aliases to the .dts files and drop the ones that are disabled.

> +
> +		pcie-internal@0xfbc00000 {

make this

		pci@fbc00000 {

> +			compatible = "pci-host-ecam-generic";
> +			device_type = "pci";
> +			#size-cells = <2>;
> +			#address-cells = <3>;
> +			#interrupt-cells = <1>;
> +			reg = <0x0 0xfbc00000 0x0 0x100000>;
> +			interrupt-map-mask = <0xf800 0 0 7>;
> +			/* add legacy interrupts for SATA only */
> +			interrupt-map = <0x4000 0 0 1 &gic 0 53 4>,
> +					<0x4800 0 0 1 &gic 0 54 4>;

What's wrong with the other IRQs? Not connected?

> +
> +		uart0: uart@fd883000 {

			serial@fd883000


Almost all devices are in the 0xfd000000 range. Could this be a bus in the
SoC that has all the devices attached to it? Maybe use a "ranges" property
to reflect that. In doubt, use the register numbers from the data sheet if you
have one.

	Arnd