RE: [PATCH net v4] r8169:fix "rtl_counters_cond == 1 (loop: 1000, delay: 10)" log spam.

From: Hau
Date: Thu Feb 25 2016 - 00:49:43 EST


> Fine with me.
>
> Is there any chance for the set of chipset dependent registers that are safe to
> be read when in D3 state to be documented ?
>

I think except registers in PCI configuration, all other registers should be read in D0 state.

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