Re: [RFC][PATCH 04/31] locking,arm: Implement atomic{,64}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()
From: Will Deacon
Date: Fri Apr 22 2016 - 07:35:57 EST
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- In reply to: Peter Zijlstra: "[RFC][PATCH 04/31] locking,arm: Implement atomic{,64}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()"
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On Fri, Apr 22, 2016 at 11:04:17AM +0200, Peter Zijlstra wrote:
> Implement FETCH-OP atomic primitives, these are very similar to the
> existing OP-RETURN primitives we already have, except they return the
> value of the atomic variable _before_ modification.
>
> This is especially useful for irreversible operations -- such as
> bitops (because it becomes impossible to reconstruct the state prior
> to modification).
>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
> ---
> arch/arm/include/asm/atomic.h | 108 ++++++++++++++++++++++++++++++++++++++----
> 1 file changed, 98 insertions(+), 10 deletions(-)
>
> --- a/arch/arm/include/asm/atomic.h
> +++ b/arch/arm/include/asm/atomic.h
> @@ -77,8 +77,36 @@ static inline int atomic_##op##_return_r
> return result; \
> }
[...]
> +static inline long long \
> +atomic64_fetch_##op##_relaxed(long long i, atomic64_t *v) \
> +{ \
> + long long result, val; \
> + unsigned long tmp; \
> + \
> + prefetchw(&v->counter); \
> + \
> + __asm__ __volatile__("@ atomic64_fetch_" #op "\n" \
> +"1: ldrexd %0, %H0, [%4]\n" \
> +" " #op1 " %Q1, %Q0, %Q5\n" \
> +" " #op2 " %R1, %R0, %R5\n" \
> +" strexd %2, %1, %H0, [%4]\n" \
You want %H1 here.
With that:
Acked-by: Will Deacon <will.deacon@xxxxxxx>
Will
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- In reply to: Peter Zijlstra: "[RFC][PATCH 04/31] locking,arm: Implement atomic{,64}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()"
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