Re: [RFC PATCH 0/3] kvm: x86: speedups for APICv

[Radim KrÄmÃÅ]

2016-09-29 17:41-0400, Paolo Bonzini:
>> Another possible optimization: when delivering an IPI, don't write the
>> vector to PIR, but directly to VIRR.  If the guest is not in VMX
>> non-root mode, then vm entry will take care of the injection; in the
>> other case, we'll send POSTED_INTR_VECTOR.
>> It seems that we don't even have to set PI.ON -- SDM doesn't say it is
>> necessary to evaluate pending virtual interrupts after receiving the
>> notification interrupt.  If we have to set PI.ON, we can just skip the
>> PIR->VIRR sync as long as the VM doesn't have an assigned device,
>> because we know that PIR is empty.
> 
> Nope, you cannot write to the APIC page while the VM is running.

True, thanks.

> (We're already reading the manual in such a way as to "allow" us to
> write TMR while the VM is running, but that should not be extended.
> For example the SDM doesn't say that the processor accesses VIRR with
> atomic instructions, in fact it probably doesn't).

Yeah, TMR is not used by the hardware ...