Re: [PATCH v3] x86/tsc: add X86_FEATURE_TSC_KNOWN_FREQ flag

[Peter Zijlstra]

On Thu, Oct 20, 2016 at 11:57:03AM +0200, Thomas Gleixner wrote:
> On Thu, 13 Oct 2016, Bin Gao wrote:
> > @@ -702,6 +702,15 @@ unsigned long native_calibrate_tsc(void)
> >  		}
> >  	}
> >  
> > +	setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
> > +
> > +	/*
> > +	 * For Atom SoCs TSC is the only reliable clocksource.
> > +	 * Mark TSC reliable so no watchdog on it.
> > +	 */
> > +	if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT)
> > +		setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
> > +

AFAICT setting TSC_RELIABLE also skips the check_tsc_warp() tests in
tsc_sync.c.

This means that if someone does a Goldmont BIOS with 'features', we'll
never detect the wreckage :-/