Re: [PATCH v2 4/4] Cleaned the code, no functional changes.

From: Andy Shevchenko
Date: Fri Oct 21 2016 - 06:56:19 EST

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On Fri, 2016-10-14 at 17:52 +0100, Luis.Oliveira@xxxxxxxxxxxx wrote:
> From: Luis Oliveira <lolivei@xxxxxxxxxxxx>
>

Style issues.

The parts of this patch shouldn't be brought by the others patches in
the series. Consider carefully check your patches before submitting.

> Signed-off-by: Luis Oliveira <lolivei@xxxxxxxxxxxx>
> ---
> Âdrivers/i2c/busses/i2c-designware-core.cÂÂÂÂ| 113 ++++++++++++++-----
> ---------
> Âdrivers/i2c/busses/i2c-designware-platdrv.c |ÂÂ24 +++---
> Â2 files changed, 68 insertions(+), 69 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-designware-core.c
> b/drivers/i2c/busses/i2c-designware-core.c
> index 71a377e..4196491 100644
> --- a/drivers/i2c/busses/i2c-designware-core.c
> +++ b/drivers/i2c/busses/i2c-designware-core.c
> @@ -90,15 +90,15 @@
> Â#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL |
> \
> Â ÂDW_IC_INTR_TX_ABRT | \
> Â ÂDW_IC_INTR_STOP_DET)
> -Â
> +
> Â#define DW_IC_INTR_MASTER_MASK (DW_IC_INTR_DEFAULT_MAS
> K | \
> Â ÂDW_IC_INTR_TX_EMPTY)
> - Â
> +
> Â#define DW_IC_INTR_SLAVE_MASK (DW_IC_INTR_DEFAULT_MASK
> | \
> Â ÂDW_IC_INTR_RX_DONE | \
> -ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂDW_IC_INTR_RX_UNDER | \
> -ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂDW_IC_INTR_RD_REQ)
> - Â
> + ÂÂÂÂDW_IC_INTR_RX_UNDER | \
> + ÂÂÂÂDW_IC_INTR_RD_REQ)
> +
> Â#define DW_IC_STATUS_ACTIVITY 0x1
> Â#define DW_IC_STATUS_TFE BIT(2)
> Â#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
> @@ -229,7 +229,7 @@ static void i2c_dw_configure_fifo_master(struct
> dw_i2c_dev *dev)
> Â dw_writel(dev, 0, DW_IC_RX_TL);
> Â
> Â /* configure the i2c master */
> - dw_writel(dev, dev->master_cfg , DW_IC_CON);
> + dw_writel(dev, dev->master_cfg, DW_IC_CON);
> Â dw_writel(dev, DW_IC_INTR_MASTER_MASK,
> DW_IC_INTR_MASK);
> Â}
> Â
> @@ -240,7 +240,7 @@ static void i2c_dw_configure_fifo_slave(struct
> dw_i2c_dev *dev)
> Â dw_writel(dev, 0, DW_IC_RX_TL);
> Â
> Â /* configure the i2c slave */
> - dw_writel(dev, dev->slave_cfg , DW_IC_CON);
> + dw_writel(dev, dev->slave_cfg, DW_IC_CON);
> Â dw_writel(dev, DW_IC_INTR_SLAVE_MASK,
> DW_IC_INTR_MASK);
> Â}
> Â
> @@ -386,8 +386,8 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
> Â /* Configure register access mode 16bit */
> Â dev->accessor_flags |= ACCESS_16BIT;
> Â } else if (reg != DW_IC_COMP_TYPE_VALUE) {
> - dev_err(dev->dev, "Unknown Synopsys component type: "
> - "0x%08x\n", reg);
> + dev_err(dev->dev, "Unknown Synopsys component type:
> 0x%08x\n",
> + reg);
> Â i2c_dw_release_lock(dev);
> Â return -ENODEV;
> Â }
> @@ -475,7 +475,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
> Â }
> Â
> Â if ((dev->master_cfg & DW_IC_CON_MASTER) &&
> - (dev->master_cfg & DW_IC_CON_SLAVE_DISABLE))Â
> + (dev->master_cfg & DW_IC_CON_SLAVE_DISABLE))
> Â i2c_dw_configure_fifo_master(dev);
> Â else
> Â i2c_dw_configure_fifo_slave(dev);
> @@ -814,6 +814,7 @@ done_nolock:
> Âstatic u32 i2c_dw_func(struct i2c_adapter *adap)
> Â{
> Â struct dw_i2c_dev *dev = i2c_get_adapdata(adap);
> +
> Â return dev->functionality;
> Â}
> Â
> @@ -821,19 +822,19 @@ static int i2c_dw_reg_slave(struct i2c_client
> *slave)
> Â{
> Â struct dw_i2c_dev *dev =ÂÂi2c_get_adapdata(slave->adapter);
> Â
> - if(dev->slave)
> + if (dev->slave)
> Â return -EBUSY;
> - if(slave->flags & I2C_CLIENT_TEN)
> + if (slave->flags & I2C_CLIENT_TEN)
> Â return -EAFNOSUPPORT;
> - /* set slave address in the IC_SAR register,Â
> - * the address to which the DW_apb_i2c responds */
> + /* set slave address in the IC_SAR register,
> + Â* the address to which the DW_apb_i2c responds */
> Â
> Â __i2c_dw_enable(dev, false);
> -
> +
> Â dw_writel(dev, slave->addr, DW_IC_SAR);
> Â
> Â pm_runtime_get_sync(dev->dev);
> -
> +
> Â dev->slave = slave;
> Â
> Â __i2c_dw_enable(dev, true);
> @@ -929,78 +930,76 @@ static u32 i2c_dw_read_clear_intrbits(struct
> dw_i2c_dev *dev)
> Â * Interrupt service routine. This gets called whenever an I2C
> interrupt
> Â * occurs.
> Â */
> -Â
> -static bool i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev )
> +
> +static bool i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev)
> Â{
> Â u32 raw_stat, stat, enabled;
> Â u8 val, slave_activity;
> -
> +
> Â stat = dw_readl(dev, DW_IC_INTR_STAT);
> Â enabled = dw_readl(dev, DW_IC_ENABLE);
> Â raw_stat = dw_readl(dev, DW_IC_RAW_INTR_STAT);
> - slave_activity = ((dw_readl(dev,DW_IC_STATUS) &Â
> - DW_IC_STATUS_SLAVE_ACTIVITY)>>6);
> -
> - dev_dbg(dev->dev,Â
> - "%s: %#x SLAVE_ACTV=%#x : RAW_INTR_STAT=%#x :
> INTR_STAT=%#x\n",Â
> - Â__func__, enabled, slave_activity, raw_stat, stat);Â
> + slave_activity = ((dw_readl(dev, DW_IC_STATUS)
> + & DW_IC_STATUS_SLAVE_ACTIVITY)>>6);
> +
> + dev_dbg(dev->dev,
> + "%s: %#x SLAVE_ACTV=%#x : RAW_INTR_STAT=%#x :
> INTR_STAT=%#x\n",
> + Â__func__, enabled, slave_activity, raw_stat, stat);
> Â
> Â if (stat & DW_IC_INTR_START_DET)
> Â dw_readl(dev, DW_IC_CLR_START_DET);
> -
> +
> Â if (stat & DW_IC_INTR_ACTIVITY)
> Â dw_readl(dev, DW_IC_CLR_ACTIVITY);
> Â
> Â if (stat & DW_IC_INTR_RX_OVER)
> Â dw_readl(dev, DW_IC_CLR_RX_OVER);
> -
> -ÂÂÂÂÂÂÂif ((stat & DW_IC_INTR_RX_FULL) && (stat &
> DW_IC_INTR_STOP_DET))Â
> +
> + if ((stat & DW_IC_INTR_RX_FULL) && (stat &
> DW_IC_INTR_STOP_DET))
> Â i2c_slave_event(dev->slave,
> I2C_SLAVE_WRITE_REQUESTED, &val);
> -
> - if (slave_activity) {ÂÂÂÂÂ
> - if (stat & DW_IC_INTR_RD_REQ) {ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ
> +
> + if (slave_activity) {
> + if (stat & DW_IC_INTR_RD_REQ) {
> Â if (stat & DW_IC_INTR_RX_FULL) {
> Â val = dw_readl(dev, DW_IC_DATA_CMD);
> - if (!i2c_slave_event(dev->slave,Â
> + if (!i2c_slave_event(dev->slave,
> Â I2C_SLAVE_WRITE_RECEIVED,
> &val)) {
> - dev_dbg(dev->dev, "Byte %X
> acked! ",val);
> + dev_dbg(dev->dev, "Byte %X
> acked! ", val);
> Â }
> Â dw_readl(dev, DW_IC_CLR_RD_REQ);
> Â stat =
> i2c_dw_read_clear_intrbits(dev);
> - }
> - else {
> + } else {
> Â dw_readl(dev, DW_IC_CLR_RD_REQ);
> Â dw_readl(dev, DW_IC_CLR_RX_UNDER);
> Â stat =
> i2c_dw_read_clear_intrbits(dev);
> - }ÂÂÂÂÂ
> - if (!i2c_slave_event(dev->slave,Â
> + }
> + if (!i2c_slave_event(dev->slave,
> Â I2C_SLAVE_READ_REQUESTED,
> &val))
> Â dw_writel(dev, val, DW_IC_DATA_CMD);
> Â }
> - }ÂÂÂÂÂÂÂÂ
> -
> + }
> +
> Â if (stat & DW_IC_INTR_RX_DONE) {
> -
> - if (!i2c_slave_event(dev->slave,
> I2C_SLAVE_READ_PROCESSED, &val))Â
> +
> + if (!i2c_slave_event(dev->slave,
> I2C_SLAVE_READ_PROCESSED, &val))
> Â dw_readl(dev, DW_IC_CLR_RX_DONE);
> -
> - i2c_slave_event(dev->slave, I2C_SLAVE_STOP , &val);
> +
> + i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
> Â stat = i2c_dw_read_clear_intrbits(dev);
> Â
> Â return true;
> Â }
> -ÂÂÂÂÂÂÂÂ
> - if (stat & DW_IC_INTR_RX_FULL) {Â
> +
> + if (stat & DW_IC_INTR_RX_FULL) {
> Â val = dw_readl(dev, DW_IC_DATA_CMD);
> Â if (!i2c_slave_event(dev->slave,
> I2C_SLAVE_WRITE_RECEIVED, &val))
> - dev_dbg(dev->dev, "Byte %X acked! ",val);
> - }Â
> - else {
> - i2c_slave_event(dev->slave, I2C_SLAVE_STOP , &val);
> + dev_dbg(dev->dev, "Byte %X acked! ", val);
> + } else {
> + i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
> Â stat = i2c_dw_read_clear_intrbits(dev);
> Â }
> Â
> - if (stat & DW_IC_INTR_TX_OVER) {
> + if (stat & DW_IC_INTR_TX_OVER) {
> Â dw_readl(dev, DW_IC_CLR_TX_OVER);
> Â return true;
> Â }
> @@ -1008,12 +1007,12 @@ static bool i2c_dw_irq_handler_slave(struct
> dw_i2c_dev *dev )
> Â return true;
> Â}
> Â
> -static bool i2c_dw_irq_handler_master(struct dw_i2c_dev *dev )
> +static bool i2c_dw_irq_handler_master(struct dw_i2c_dev *dev)
> Â{
> Â u32 stat;
> -
> +
> Â stat = i2c_dw_read_clear_intrbits(dev);
> -
> +
> Â if (stat & DW_IC_INTR_TX_ABRT) {
> Â dev->cmd_err |= DW_IC_ERR_TX_ABRT;
> Â dev->status = STATUS_IDLE;
> @@ -1068,17 +1067,17 @@ static irqreturn_t i2c_dw_isr(int this_irq,
> void *dev_id)
> Â enabled = dw_readl(dev, DW_IC_ENABLE);
> Â mode = dw_readl(dev, DW_IC_CON);
> Â stat = dw_readl(dev, DW_IC_RAW_INTR_STAT);
> -
> +
> Â dev_dbg(dev->dev, "%s: enabled=%#x stat=%#x\n", __func__,
> enabled, stat);
> Â if (!enabled || !(stat & ~DW_IC_INTR_ACTIVITY))
> Â return IRQ_NONE;
> -
> +
> Â if (!(mode & DW_IC_CON_MASTER) && !(mode &
> DW_IC_CON_SLAVE_DISABLE)) {
> Â stat = i2c_dw_read_clear_intrbits(dev);
> Â if (!i2c_dw_irq_handler_slave(dev))
> Â return IRQ_NONE;
> Â } else {
> - if(i2c_dw_irq_handler_master(dev))
> + if (i2c_dw_irq_handler_master(dev))
> Â return IRQ_HANDLED;
> Â }
> Â
> @@ -1148,7 +1147,7 @@ int i2c_dw_probe(struct dw_i2c_dev *dev)
> Â adap->dev.parent = dev->dev;
> Â i2c_set_adapdata(adap, dev);
> Â
> - if (!i2c_check_functionality(adap,I2C_FUNC_SLAVE))Â
> + if (!i2c_check_functionality(adap, I2C_FUNC_SLAVE))
> Â i2c_dw_disable_int(dev);
> Â
> Â r = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr,
> diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c
> b/drivers/i2c/busses/i2c-designware-platdrv.c
> index f29e657..035b93f 100644
> --- a/drivers/i2c/busses/i2c-designware-platdrv.c
> +++ b/drivers/i2c/busses/i2c-designware-platdrv.c
> @@ -141,13 +141,13 @@ static inline int dw_i2c_acpi_configure(struct
> platform_device *pdev)
> Âstatic void i2c_dw_configure_master(struct platform_device *pdev)
> Â{
> Â struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
> -
> +
> Â dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE
> |
> Â ÂÂDW_IC_CON_RESTART_EN;
> - ÂÂ
> +
> Â dev->functionality |= I2C_FUNC_10BIT_ADDR;
> Â dev_info(&pdev->dev, "I am registed as a I2C Master!\n");
> -
> +
> Â switch (dev->clk_freq) {
> Â case 100000:
> Â dev->master_cfg |= DW_IC_CON_SPEED_STD;
> @@ -158,25 +158,25 @@ static void i2c_dw_configure_master(struct
> platform_device *pdev)
> Â default:
> Â dev->master_cfg |= DW_IC_CON_SPEED_FAST;
> Â }
> -
> +
> Â}
> Â
> Âstatic void i2c_dw_configure_slave(struct platform_device *pdev)
> Â{
> Â struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
> -
> - dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |Â
> - ÂÂDW_IC_CON_RESTART_EN |
> DW_IC_CON_STOP_DET_IFADDRESSED |Â
> +
> + dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
> + ÂÂDW_IC_CON_RESTART_EN |
> DW_IC_CON_STOP_DET_IFADDRESSED |
> Â ÂÂDW_IC_CON_SPEED_FAST;
> - ÂÂ
> +
> Â dev->functionality |= I2C_FUNC_SLAVE;
> Â dev->functionality &= ~I2C_FUNC_10BIT_ADDR;
> Â dev_info(&pdev->dev, "I am registed as a I2C Slave!\n");
> -
> +
> Â switch (dev->clk_freq) {
> Â case 100000:
> Â dev->slave_cfg |= DW_IC_CON_SPEED_STD;
> -
> +
> Â case 3400000:
> Â dev->slave_cfg |= DW_IC_CON_SPEED_HIGH;
> Â break;
> @@ -272,10 +272,10 @@ static int dw_i2c_plat_probe(struct
> platform_device *pdev)
> Â I2C_FUNC_SMBUS_BYTE_DATA |
> Â I2C_FUNC_SMBUS_WORD_DATA |
> Â I2C_FUNC_SMBUS_I2C_BLOCK;
> -
> +
> Â if (is_slave)
> Â i2c_dw_configure_slave(pdev);
> - elseÂ
> + else
> Â i2c_dw_configure_master(pdev);
> Â
> Â dev->clk = devm_clk_get(&pdev->dev, NULL);

--
Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Intel Finland Oy

Next message: Sebastian Andrzej Siewior: "Re: [PREEMPT-RT] Oops in rapl_cpu_prepare()"
Previous message: Brian Starkey: "Re: [PATCH v5 4/4] drm/fence: add out-fences support"
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