[tip:timers/urgent] clocksource/exynos_mct: Clear interrupt when cpu is shut down
From: tip-bot for Joonyoung Shim
Date: Tue Jan 17 2017 - 04:13:56 EST
Commit-ID: bc7c36eedb0c7004aa06c2afc3c5385adada8fa3
Gitweb: http://git.kernel.org/tip/bc7c36eedb0c7004aa06c2afc3c5385adada8fa3
Author: Joonyoung Shim <jy0922.shim@xxxxxxxxxxx>
AuthorDate: Tue, 17 Jan 2017 13:54:36 +0900
Committer: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitDate: Tue, 17 Jan 2017 10:08:38 +0100
clocksource/exynos_mct: Clear interrupt when cpu is shut down
When a CPU goes offline a potentially pending timer interrupt is not
cleared. When the CPU comes online again then the pending interrupt is
delivered before the per cpu clockevent device is initialized. As a
consequence the tick interrupt handler dereferences a NULL pointer.
[ 51.251378] Unable to handle kernel NULL pointer dereference at virtual address 00000040
[ 51.289348] task: ee942d00 task.stack: ee960000
[ 51.293861] PC is at tick_periodic+0x38/0xb0
[ 51.298102] LR is at tick_handle_periodic+0x1c/0x90
Clear the pending interrupt in the cpu dying path.
Fixes: 56a94f13919c ("clocksource: exynos_mct: Avoid blocking calls in the cpu hotplug notifier")
Reported-by: Seung-Woo Kim <sw0312.kim@xxxxxxxxxxx>
Signed-off-by: Joonyoung Shim <jy0922.shim@xxxxxxxxxxx>
Cc: linux-samsung-soc@xxxxxxxxxxxxxxx
Cc: cw00.choi@xxxxxxxxxxx
Cc: daniel.lezcano@xxxxxxxxxx
Cc: stable@xxxxxxxxxxxxxxx
Cc: javier@xxxxxxxxxxxxxxx
Cc: kgene@xxxxxxxxxx
Cc: krzk@xxxxxxxxxx
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
Link: http://lkml.kernel.org/r/1484628876-22065-1-git-send-email-jy0922.shim@xxxxxxxxxxx
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
---
drivers/clocksource/exynos_mct.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 4da1dc2..670ff0f 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -495,6 +495,7 @@ static int exynos4_mct_dying_cpu(unsigned int cpu)
if (mct_int_type == MCT_INT_SPI) {
if (evt->irq != -1)
disable_irq_nosync(evt->irq);
+ exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
} else {
disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
}