Re: [PATCH v3 5/6] gpio: Add gpio driver support for ThunderX and OCTEON-TX

From: kbuild test robot
Date: Wed Feb 15 2017 - 06:12:43 EST

Next message: Mark Rutland: "Re: [PATCH RFC 1/3] coresight: binding for coresight debug driver"
Previous message: Wanpeng Li: "[PATCH] KVM: nVMX: Fix L2 fails to boot due to VM entry with invalid control field"
In reply to: David Daney: "[PATCH v3 5/6] gpio: Add gpio driver support for ThunderX and OCTEON-TX"
Next in thread: David Daney: "[PATCH v3 6/6] MAINTAINERS: Add entry for THUNDERX GPIO Driver."
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

Hi David,

[auto build test ERROR on tip/irq/core]
[also build test ERROR on v4.10-rc8 next-20170215]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/David-Daney/genirq-gpio-Add-driver-for-ThunderX-and-OCTEON-TX-SoCs/20170215-023004
config: sparc64-allmodconfig (attached as .config)
compiler: sparc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=sparc64

All error/warnings (new ones prefixed by >>):

drivers/gpio/gpio-thunderx.c: In function 'thunderx_gpio_irq_set_type':
>> drivers/gpio/gpio-thunderx.c:243:32: error: 'handle_fasteoi_edge_irq' undeclared (first use in this function)
irq_set_handler_locked(data, handle_fasteoi_edge_irq);
^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpio/gpio-thunderx.c:243:32: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/gpio/gpio-thunderx.c:246:32: error: 'handle_fasteoi_level_irq' undeclared (first use in this function)
irq_set_handler_locked(data, handle_fasteoi_level_irq);
^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpio/gpio-thunderx.c: In function 'thunderx_gpio_irq_enable':
>> drivers/gpio/gpio-thunderx.c:265:2: error: implicit declaration of function 'irq_chip_enable_parent' [-Werror=implicit-function-declaration]
irq_chip_enable_parent(data);
^~~~~~~~~~~~~~~~~~~~~~
drivers/gpio/gpio-thunderx.c: In function 'thunderx_gpio_irq_disable':
>> drivers/gpio/gpio-thunderx.c:272:2: error: implicit declaration of function 'irq_chip_disable_parent' [-Werror=implicit-function-declaration]
irq_chip_disable_parent(data);
^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpio/gpio-thunderx.c: At top level:
>> drivers/gpio/gpio-thunderx.c:289:14: error: 'irq_chip_eoi_parent' undeclared here (not in a function)
.irq_eoi = irq_chip_eoi_parent,
^~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-thunderx.c:290:22: error: 'irq_chip_set_affinity_parent' undeclared here (not in a function)
.irq_set_affinity = irq_chip_set_affinity_parent,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpio/gpio-thunderx.c: In function 'thunderx_gpio_irq_alloc':
>> drivers/gpio/gpio-thunderx.c:320:9: error: implicit declaration of function 'irq_domain_set_hwirq_and_chip' [-Werror=implicit-function-declaration]
return irq_domain_set_hwirq_and_chip(d, virq, txline->line,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpio/gpio-thunderx.c: At top level:
>> drivers/gpio/gpio-thunderx.c:326:2: error: unknown field 'alloc' specified in initializer
.alloc = thunderx_gpio_irq_alloc,
^
>> drivers/gpio/gpio-thunderx.c:326:12: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types]
.alloc = thunderx_gpio_irq_alloc,
^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpio/gpio-thunderx.c:326:12: note: (near initialization for 'thunderx_gpio_irqd_ops.unmap')
>> drivers/gpio/gpio-thunderx.c:327:2: error: unknown field 'translate' specified in initializer
.translate = thunderx_gpio_irq_translate
^
drivers/gpio/gpio-thunderx.c:327:15: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types]
.translate = thunderx_gpio_irq_translate
^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpio/gpio-thunderx.c:327:15: note: (near initialization for 'thunderx_gpio_irqd_ops.xlate')
drivers/gpio/gpio-thunderx.c: In function 'thunderx_gpio_probe':
>> drivers/gpio/gpio-thunderx.c:419:17: error: implicit declaration of function 'irq_domain_create_hierarchy' [-Werror=implicit-function-declaration]
txgpio->irqd = irq_domain_create_hierarchy(irq_get_irq_data(txgpio->msix_entries[0].vector)->domain,
^~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-thunderx.c:419:15: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
txgpio->irqd = irq_domain_create_hierarchy(irq_get_irq_data(txgpio->msix_entries[0].vector)->domain,
^
>> drivers/gpio/gpio-thunderx.c:427:9: error: implicit declaration of function 'irq_domain_push_irq' [-Werror=implicit-function-declaration]
err = irq_domain_push_irq(txgpio->irqd,
^~~~~~~~~~~~~~~~~~~
drivers/gpio/gpio-thunderx.c: In function 'thunderx_gpio_remove':
>> drivers/gpio/gpio-thunderx.c:465:3: error: implicit declaration of function 'irq_domain_pop_irq' [-Werror=implicit-function-declaration]
irq_domain_pop_irq(txgpio->irqd,
^~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors

vim +/handle_fasteoi_edge_irq +243 drivers/gpio/gpio-thunderx.c

237
238 irqd_set_trigger_type(data, flow_type);
239
240 bit_cfg = GLITCH_FILTER_400NS | GPIO_BIT_CFG_INT_EN;
241
242 if (flow_type & IRQ_TYPE_EDGE_BOTH) {
> 243 irq_set_handler_locked(data, handle_fasteoi_edge_irq);
244 bit_cfg |= GPIO_BIT_CFG_INT_TYPE;
245 } else {
> 246 irq_set_handler_locked(data, handle_fasteoi_level_irq);
247 }
248
249 raw_spin_lock(&txgpio->lock);
250 if (flow_type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)) {
251 bit_cfg |= GPIO_BIT_CFG_PIN_XOR;
252 set_bit(txline->line, txgpio->invert_mask);
253 } else {
254 clear_bit(txline->line, txgpio->invert_mask);
255 }
256 clear_bit(txline->line, txgpio->od_mask);
257 writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(txline->line));
258 raw_spin_unlock(&txgpio->lock);
259
260 return IRQ_SET_MASK_OK;
261 }
262
263 static void thunderx_gpio_irq_enable(struct irq_data *data)
264 {
> 265 irq_chip_enable_parent(data);
266 thunderx_gpio_irq_unmask(data);
267 }
268
269 static void thunderx_gpio_irq_disable(struct irq_data *data)
270 {
271 thunderx_gpio_irq_mask(data);
> 272 irq_chip_disable_parent(data);
273 }
274
275 /*
276 * Interrupts are chained from underlying MSI-X vectors. We have
277 * these irq_chip functions to be able to handle level triggering
278 * semantics and other acknowledgment tasks associated with the GPIO
279 * mechanism.
280 */
281 static struct irq_chip thunderx_gpio_irq_chip = {
282 .name = "GPIO",
283 .irq_enable = thunderx_gpio_irq_enable,
284 .irq_disable = thunderx_gpio_irq_disable,
285 .irq_ack = thunderx_gpio_irq_ack,
286 .irq_mask = thunderx_gpio_irq_mask,
287 .irq_mask_ack = thunderx_gpio_irq_mask_ack,
288 .irq_unmask = thunderx_gpio_irq_unmask,
> 289 .irq_eoi = irq_chip_eoi_parent,
> 290 .irq_set_affinity = irq_chip_set_affinity_parent,
291 .irq_set_type = thunderx_gpio_irq_set_type,
292
293 .flags = IRQCHIP_SET_TYPE_MASKED
294 };
295
296 static int thunderx_gpio_irq_map(struct irq_domain *d, unsigned int irq,
297 irq_hw_number_t hwirq)
298 {
299 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
300 return 0;
301 }
302
303 static int thunderx_gpio_irq_translate(struct irq_domain *d,
304 struct irq_fwspec *fwspec,
305 irq_hw_number_t *hwirq,
306 unsigned int *type)
307 {
308 if (WARN_ON(fwspec->param_count < 2))
309 return -EINVAL;
310 *hwirq = fwspec->param[0];
311 *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
312 return 0;
313 }
314
315 static int thunderx_gpio_irq_alloc(struct irq_domain *d, unsigned int virq,
316 unsigned int nr_irqs, void *arg)
317 {
318 struct thunderx_line *txline = arg;
319
> 320 return irq_domain_set_hwirq_and_chip(d, virq, txline->line,
321 &thunderx_gpio_irq_chip, txline);
322 }
323
324 static const struct irq_domain_ops thunderx_gpio_irqd_ops = {
325 .map = thunderx_gpio_irq_map,
> 326 .alloc = thunderx_gpio_irq_alloc,
> 327 .translate = thunderx_gpio_irq_translate
328 };
329
330 static int thunderx_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
331 {
332 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
333
334 return irq_find_mapping(txgpio->irqd, offset);
335 }
336
337 static int thunderx_gpio_probe(struct pci_dev *pdev,
338 const struct pci_device_id *id)
339 {
340 void __iomem * const *tbl;
341 struct device *dev = &pdev->dev;
342 struct thunderx_gpio *txgpio;
343 struct gpio_chip *chip;
344 int ngpio, i;
345 int err = 0;
346
347 txgpio = devm_kzalloc(dev, sizeof(*txgpio), GFP_KERNEL);
348 if (!txgpio)
349 return -ENOMEM;
350
351 raw_spin_lock_init(&txgpio->lock);
352 chip = &txgpio->chip;
353
354 pci_set_drvdata(pdev, txgpio);
355
356 err = pcim_enable_device(pdev);
357 if (err) {
358 dev_err(dev, "Failed to enable PCI device: err %d\n", err);
359 goto out;
360 }
361
362 err = pcim_iomap_regions(pdev, 1 << 0, KBUILD_MODNAME);
363 if (err) {
364 dev_err(dev, "Failed to iomap PCI device: err %d\n", err);
365 goto out;
366 }
367
368 tbl = pcim_iomap_table(pdev);
369 txgpio->register_base = tbl[0];
370 if (!txgpio->register_base) {
371 dev_err(dev, "Cannot map PCI resource\n");
372 err = -ENOMEM;
373 goto out;
374 }
375
376 if (pdev->subsystem_device == 0xa10a) {
377 /* CN88XX has no GPIO_CONST register*/
378 ngpio = 50;
379 txgpio->base_msi = 48;
380 } else {
381 u64 c = readq(txgpio->register_base + GPIO_CONST);
382
383 ngpio = c & GPIO_CONST_GPIOS_MASK;
384 txgpio->base_msi = (c >> 8) & 0xff;
385 }
386
387 txgpio->msix_entries = devm_kzalloc(dev,
388 sizeof(struct msix_entry) * ngpio,
389 GFP_KERNEL);
390 if (!txgpio->msix_entries) {
391 err = -ENOMEM;
392 goto out;
393 }
394
395 txgpio->line_entries = devm_kzalloc(dev,
396 sizeof(struct thunderx_line) * ngpio,
397 GFP_KERNEL);
398 if (!txgpio->line_entries) {
399 err = -ENOMEM;
400 goto out;
401 }
402
403 for (i = 0; i < ngpio; i++) {
404 txgpio->msix_entries[i].entry = txgpio->base_msi + (2 * i);
405 txgpio->line_entries[i].line = i;
406 txgpio->line_entries[i].txgpio = txgpio;
407 }
408
409
410 /* Enable all MSI-X for interrupts on all possible lines. */
411 err = pci_enable_msix(pdev, txgpio->msix_entries, ngpio);
412 if (err < 0)
413 goto out;
414
415 /*
416 * Push GPIO specific irqdomain on hierarchy created as a side
417 * effect of the pci_enable_msix()
418 */
> 419 txgpio->irqd = irq_domain_create_hierarchy(irq_get_irq_data(txgpio->msix_entries[0].vector)->domain,
420 0, 0, of_node_to_fwnode(dev->of_node),
421 &thunderx_gpio_irqd_ops, txgpio);
422 if (!txgpio->irqd)
423 goto out;
424
425 /* Push on irq_data and the domain for each line. */
426 for (i = 0; i < ngpio; i++) {
> 427 err = irq_domain_push_irq(txgpio->irqd,
428 txgpio->msix_entries[i].vector,
429 &txgpio->line_entries[i]);
430 if (err < 0)

---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation

Attachment: .config.gz
Description: application/gzip

Next message: Mark Rutland: "Re: [PATCH RFC 1/3] coresight: binding for coresight debug driver"
Previous message: Wanpeng Li: "[PATCH] KVM: nVMX: Fix L2 fails to boot due to VM entry with invalid control field"
In reply to: David Daney: "[PATCH v3 5/6] gpio: Add gpio driver support for ThunderX and OCTEON-TX"
Next in thread: David Daney: "[PATCH v3 6/6] MAINTAINERS: Add entry for THUNDERX GPIO Driver."
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]