Re: [PATCH 2/2] fpga: Add support for Xilinx LogiCORE PR Decoupler

[Michal Simek]

On 13.3.2017 17:18, Moritz Fischer wrote:
> On Mon, Mar 13, 2017 at 3:27 AM, Michal Simek <michal.simek@xxxxxxxxxx> wrote:
>> Hi Moritz,
>>
>> On 10.3.2017 23:42, Moritz Fischer wrote:
>>> On Fri, Mar 10, 2017 at 1:30 PM, Moritz Fischer <mdf@xxxxxxxxxx> wrote:
>>>> This adds support for the Xilinx LogiCORE PR Decoupler
>>>> soft-ip that does decoupling of PR regions in the FPGA
>>>> fabric during partial reconfiguration.
>>>>
>>>> Signed-off-by: Moritz Fischer <mdf@xxxxxxxxxx>
>>>> Cc: Michal Simek <michal.simek@xxxxxxxxxx>
>>>> Cc: SÃren Brinkmann <soren.brinkmann@xxxxxxxxxx>
>>>> Cc: linux-kernel@xxxxxxxxxxxxxxx
>>>> Cc: devicetree@xxxxxxxxxxxxxxx
>>>> ---
>>>>  drivers/fpga/Kconfig               |   9 +++
>>>>  drivers/fpga/Makefile              |   1 +
>>>>  drivers/fpga/xilinx-pr-decoupler.c | 156 +++++++++++++++++++++++++++++++++++++
>>>>  3 files changed, 166 insertions(+)
>>>>  create mode 100644 drivers/fpga/xilinx-pr-decoupler.c
>>
>> I have written very similar driver some week ago but didn't sent it out.
> 
> Hah. I'll take a look.
> 
>> Here it is.
>> https://github.com/Xilinx/linux-xlnx/blob/master/drivers/fpga/xilinx-pr-decoupler.c
>>
>> Your clk handling is better and my enable_show is better.
>> You shouldn't rely on setting status before. It is better to read that
>> reg again. The reason is you can connect status signal from one PR
>> decoupler to decouple input which can change status
> 
> I will just merge them together and add you to author's list if that's
> fine with you?

sure. Go ahead.

> 
>> There is another topic I wanted to open in connection to this. There
>> should be gpio based bridge because this pr decoupler can be without axi
>> interface and for that gpio driver would be useful.
> 
> That's a good idea. I can look at that. This can be pretty generic
> code I suppose.

yes - it should be. Simple gpio driver with polarity support should be
enough.

Thanks,
Michal