Re: [PATCH v6 03/11] powerpc/powernv: Detect supported IMC units and its events

[Stewart Smith]

Madhavan Srinivasan <maddy@xxxxxxxxxxxxxxxxxx> writes:
> --- a/arch/powerpc/platforms/powernv/opal-imc.c
> +++ b/arch/powerpc/platforms/powernv/opal-imc.c
> @@ -33,6 +33,388 @@
<snip>
> +static void imc_pmu_setup(struct device_node *parent)
> +{
> +	struct device_node *child;
> +	int pmu_count = 0, rc = 0;
> +	const struct property *pp;
> +
> +	if (!parent)
> +		return;
> +
> +	/* Setup all the IMC pmus */
> +	for_each_child_of_node(parent, child) {
> +		pp = of_get_property(child, "compatible", NULL);
> +		if (pp) {
> +			/*
> +			 * If there is a node with a "compatible" field,
> +			 * that's a PMU node
> +			 */
> +			rc = imc_pmu_create(child, pmu_count);
> +			if (rc)
> +				return;
> +			pmu_count++;
> +		}
> +	}
> +}

This doesn't strike me as the right kind of structure, the presence of a
compatible property really just says "hey, there's this device and it's
compatible with these ways of accessing it".

I'm guessing the idea behind having imc-nest-offset/size in a top level
node is because it's common to everything under it and the aim is to not
blow up the device tree to be enormous.

So why not go after each ibm,imc-counters-nest compatible node under the
top level ibm,opal-in-memory-counters node? (i'm not convinced that
having ibm,ibmc-counters-nest versus ibm,imc-counters-core and
ibm,imc-counters-thread as I see in the dts is correct though, as
they're all accessed exactly the same way?)

-- 
Stewart Smith
OPAL Architect, IBM.