Re: [PATCH 4/5] pinctrl: meson-gxl: Add CEC pins
From: Jerome Brunet
Date: Wed May 24 2017 - 04:54:49 EST
On Wed, 2017-05-24 at 10:20 +0200, Neil Armstrong wrote:
> Add the AO and EE domain CEC pins for the Amlogic Meson GXL SoCs.
Same comment as patch 3 in the same series
Reviewed-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
>
> Signed-off-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
> ---
> Âdrivers/pinctrl/meson/pinctrl-meson-gxl.c | 10 ++++++++++
> Â1 file changed, 10 insertions(+)
>
> diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> index 454d73f..7d81287 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> @@ -282,6 +282,9 @@
> Âstatic const unsigned int spdif_out_ao_6_pins[] = { PIN(GPIOAO_6, 0)
> };
> Âstatic const unsigned int spdif_out_ao_9_pins[] = { PIN(GPIOAO_9, 0)
> };
> Â
> +static const unsigned int ao_cec_pins[] = { PIN(GPIOAO_8, 0)
> };
> +static const unsigned int ee_cec_pins[] = { PIN(GPIOAO_8, 0)
> };
> +
> Âstatic struct meson_pmx_group meson_gxl_periphs_groups[] = {
> Â GPIO_GROUP(GPIOZ_0, EE_OFF),
> Â GPIO_GROUP(GPIOZ_1, EE_OFF),
> @@ -527,6 +530,8 @@
> Â GROUP(i2s_out_ch45_ao, 1, 1),
> Â GROUP(spdif_out_ao_6, 0, 16),
> Â GROUP(spdif_out_ao_9, 0, 4),
> + GROUP(ao_cec, 0, 15),
> + GROUP(ee_cec, 0, 14),
> Â};
> Â
> Âstatic const char * const gpio_periphs_groups[] = {
> @@ -702,6 +707,10 @@
> Â "spdif_out_ao_6", "spdif_out_ao_9",
> Â};
> Â
> +static const char * const cec_ao_groups[] = {
> + "ao_cec", "ee_cec",
> +};
> +
> Âstatic struct meson_pmx_func meson_gxl_periphs_functions[] = {
> Â FUNCTION(gpio_periphs),
> Â FUNCTION(emmc),
> @@ -740,6 +749,7 @@
> Â FUNCTION(pwm_ao_b),
> Â FUNCTION(i2s_out_ao),
> Â FUNCTION(spdif_out_ao),
> + FUNCTION(cec_ao),
> Â};
> Â
> Âstatic struct meson_bank meson_gxl_periphs_banks[] = {