Re: [PATCH] clk: sunxi-ng: h6: fix PWM gate/reset offset

From: Chen-Yu Tsai
Date: Fri Aug 10 2018 - 12:48:45 EST

On Fri, Aug 10, 2018 at 11:16 PM, Icenowy Zheng <icenowy@xxxxxxx> wrote:
> From: Rongyi Chen <chenyi@xxxxxxxxxxx>
> Currently the register offset of the PWM bus gate in Allwinner H6 clock
> driver is wrong.
> Fix this issue.
> Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> Signed-off-by: Rongyi Chen <chenyi@xxxxxxxxxxx>
> [Icenowy: refactor commit message]
> Signed-off-by: Icenowy Zheng <icenowy@xxxxxxx>

Queued up for 4.20. Thanks