Re: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a
From: Scott Wood
Date: Fri Aug 31 2018 - 16:33:23 EST
On Fri, 2018-08-31 at 06:12 +0000, Andy Tang wrote:
> Hi Scott,
> Please see my replay inline.
> > -----Original Message-----
> > From: linux-arm-kernel <linux-arm-kernel-bounces@xxxxxxxxxxxxxxxxxxx>
> > On Behalf Of Scott Wood
> > Sent: 2018å8æ31æ 1:43
> > To: Vabhav Sharma <vabhav.sharma@xxxxxxx>;
> > linux-kernel@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx;
> > robh+dt@xxxxxxxxxx; mark.rutland@xxxxxxx;
> > linuxppc-dev@xxxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> > mturquette@xxxxxxxxxxxx; sboyd@xxxxxxxxxx; rjw@xxxxxxxxxxxxx;
> > viresh.kumar@xxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx;
> > linux-pm@xxxxxxxxxxxxxxx; linux-kernel-owner@xxxxxxxxxxxxxxx;
> > catalin.marinas@xxxxxxx; will.deacon@xxxxxxx;
> > gregkh@xxxxxxxxxxxxxxxxxxx; arnd@xxxxxxxx;
> > kstewart@xxxxxxxxxxxxxxxxxxx; yamada.masahiro@xxxxxxxxxxxxx
> > Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@xxxxxxx>; Andy Tang
> > <andy.tang@xxxxxxx>; linux@xxxxxxxxxxxxxxx; Varun Sethi
> > <V.Sethi@xxxxxxx>; Udit Kumar <udit.kumar@xxxxxxx>
> > Subject: Re: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for
> > lx2160a
> > On Thu, 2018-08-30 at 12:39 -0500, Scott Wood wrote:
> > > On Thu, 2018-08-30 at 07:36 +0000, Vabhav Sharma wrote:
> > > > >
> > > > > Why are you increasing NUM_CMUX beyond 8 for a chip that only
> > has
> > > > > 8 entries in cmux_to_group?
> > > >
> > > > Configuration is 16 cores,8 cluster with 2 cores in each cluster
> > >
> > > So? This is about cmuxes, not cores. You're increasing the array
> > > without ever using the new size.
> > Oh, and you also broke p4080 which has 8 cmuxes but no -1 terminator,
> > because the array was of length 8. Probably the array should be changed
> > to NUM_CMUX+1 so every array can be -1 terminated.
> [Andy] How about we add -1 terminator to p4080 and increase NUM_CMUX to 16?
Why 16? What does such a change have to do with this chip, which according to
the rest of the patch has 8 cmuxes?
> We don't want to increase NUM_CMUX each time new soc with more cmuxes added.
You don't want to have to make a trivial change each time you exceed a limit
that has yet to be exceeded once since NUM_CMUX was added? This isn't ABI or
in any other way hard to change. It's right in the same file as the chip
description you'd be adding.
And even if a chip did come along with 16 cmuxes, you'd then need to increase
the array to 17 to hold the -1 if you don't want to leave a situation like the
p4080 is in now, where a chip's cmux array could be broken by increasing