Re: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver

[Christoph Hellwig]

On Mon, Sep 10, 2018 at 10:02:09PM +0530, Anup Patel wrote:
> You are thinking very much in-context of SiFive CPUs only.

No.  I think in terms of the RISC-V spec.  I could care less about
SiFive to be honest.

> Lot of SOC vendors are trying to come-up with their own CPUs
> and RISC-V spec does not restrict the use of local interrupts.

Yes, it does.

> The mie/mip/sie/sip/uie/uip are all machine word size so on
> riscv64 we can theoretically have maximum 64 local interrupts.

They could in theory IFF someone actually get the use case through
the riscv privileged spec working group.