Re: [PATCH v4 01/26] clk: sunxi-ng: a64: Fix gate bit of DSI DPHY

From: Maxime Ripard
Date: Tue Nov 13 2018 - 08:08:59 EST

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On Tue, Nov 13, 2018 at 04:46:08PM +0530, Jagan Teki wrote:
> DSI DPHY gate bit on MIPI DSI clock register is bit 15
> not bit 30.
>
> Signed-off-by: Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx>
> Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx>

Applied, thanks!
Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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Next message: Phil Edworthy: "[PATCH v3 0/2] irqchip: Add support for Renesas RZ/N1 GPIO interrupt multiplexer"
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In reply to: Jagan Teki: "[PATCH v4 01/26] clk: sunxi-ng: a64: Fix gate bit of DSI DPHY"
Next in thread: Jagan Teki: "[PATCH v4 02/26] clk: sunxi-ng: Add check for minimal rate to NKM PLLs"
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