Re: [PATCH v4 3/3] crypto: s5p: add AES support for Exynos5433
From: Krzysztof Kozlowski
Date: Tue Mar 05 2019 - 14:51:58 EST
On Tue, 5 Mar 2019 at 18:13, Guenter Roeck <linux@xxxxxxxxxxxx> wrote:
>
> On Fri, Feb 22, 2019 at 01:21:44PM +0100, Kamil Konieczny wrote:
> > Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
> >
> > Reviewed-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> > Signed-off-by: Kamil Konieczny <k.konieczny@xxxxxxxxxxxxxxxxxxx>
> > ---
> > drivers/crypto/s5p-sss.c | 50 ++++++++++++++++++++++++++++++++++++----
> > 1 file changed, 46 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
> > index 0064be0e3941..3f45cc5cb94a 100644
> > --- a/drivers/crypto/s5p-sss.c
> > +++ b/drivers/crypto/s5p-sss.c
> > @@ -232,6 +232,7 @@
> > * struct samsung_aes_variant - platform specific SSS driver data
> > * @aes_offset: AES register offset from SSS module's base.
> > * @hash_offset: HASH register offset from SSS module's base.
> > + * @clk_names: names of clocks needed to run SSS IP
> > *
> > * Specifies platform specific configuration of SSS module.
> > * Note: A structure for driver specific platform data is used for future
> > @@ -240,6 +241,7 @@
> > struct samsung_aes_variant {
> > unsigned int aes_offset;
> > unsigned int hash_offset;
> > + const char *clk_names[];
>
> This array does not have a fixed size.
Yes, correct. Kamil already sent a fix:
https://patchwork.kernel.org/patch/10835389/
Best regards,
Krzysztof