The spi-pxa2xx can't read and write data correctly on our board.Hmm.. please correct me if I'm wrong but pxa2xx_spi_unprepare_transfer() is called always when there is no more messages pending and the spi core should have deasserted the CS already?
The pxa_ssp_type is LPSS_BXT_SSP in our case.
With more debug we find that it's related to restart the SPP
during pxa2xx_spi_transfer_one().
In the normal case the spi_transfer_one_message() calls spi-pxa2xx
cs_assert before transferring one message. After completing the
transfer it calls spi-pxa2xx cs_deassert. The spi-pxa2xx works
well.
But in some other case pxa2xx_spi_unprepare_transfer() is called
that clears SSCR0_SSE bit before the next transfer. In the next
transfer the spi-pxa2xx driver will restart the SSP as the SSE
bit is cleared. The cs_assert before the SSP restart can't ensure
spi-pxa2xx work well.
The patch is to do cs again if spi-pxa2xx restar the SSP during
pxa2xx_spi_transfer_one()
Signed-off-by: xiao jin <jin.xiao@xxxxxxxxx>
Signed-off-by: he, bo <bo.he@xxxxxxxxx>
---
drivers/spi/spi-pxa2xx.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index 14f4ea59caff..1a2ea46858d9 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -928,6 +928,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master,
u32 cr1;
int err;
int dma_mapped;
+ bool need_cs_change = false;
/* Check if we can DMA this transfer */
if (transfer->len > MAX_DMA_LEN && chip->enable_dma) {
@@ -1056,6 +1057,11 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master,
if ((pxa2xx_spi_read(drv_data, SSCR0) != cr0)
|| (pxa2xx_spi_read(drv_data, SSCR1) & change_mask)
!= (cr1 & change_mask)) {
+ /* It needs to deassert the chip selection
+ * firstly before restart the SPP */
+ need_cs_change = true;
+ cs_deassert(spi);
+