Re: [PATCH] irqchip: stm32: don't set rising configuration registers at init

[Marc Zyngier]

On 07/03/2019 16:15, Fabien Dessenne wrote:
> The rising configuration status register (rtsr) is not banked.
> As it is shared with the co-processor, it should not be written at probe
> time, else the co-processor configuration will be lost.
> 
> Signed-off-by: Fabien Dessenne <fabien.dessenne@xxxxxx>

Fixes:?

> ---
>  drivers/irqchip/irq-stm32-exti.c | 5 -----
>  1 file changed, 5 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
> index 6edfd4b..ff8a84f 100644
> --- a/drivers/irqchip/irq-stm32-exti.c
> +++ b/drivers/irqchip/irq-stm32-exti.c
> @@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
>  	const struct stm32_exti_bank *stm32_bank;
>  	struct stm32_exti_chip_data *chip_data;
>  	void __iomem *base = h_data->base;
> -	u32 irqs_mask;
>  
>  	stm32_bank = h_data->drv_data->exti_banks[bank_idx];
>  	chip_data = &h_data->chips_data[bank_idx];
> @@ -725,10 +724,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
>  
>  	raw_spin_lock_init(&chip_data->rlock);
>  
> -	/* Determine number of irqs supported */
> -	writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst);
> -	irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst);
> -

And I guess you don't need to find out the number of supported IRQs?

Also, a handful of lines down, you're writing again to the same
register. Why isn't that a problem?

>  	/*
>  	 * This IP has no reset, so after hot reboot we should
>  	 * clear registers to avoid residue
> 

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...