Re: [PATCH 04/14] pwm: meson: change MISC_CLK_SEL_WIDTH to MISC_CLK_SEL_MASK

From: Neil Armstrong
Date: Mon May 27 2019 - 08:29:52 EST


On 25/05/2019 20:11, Martin Blumenstingl wrote:
> MISC_CLK_SEL_WIDTH is only used in one place where it's converted into
> a bit-mask. Rename and change the macro to be a bit-mask so that
> conversion is not needed anymore. No functional changes intended.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
> ---
> drivers/pwm/pwm-meson.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
> index c62a3ac924d0..84b28ba0f903 100644
> --- a/drivers/pwm/pwm-meson.c
> +++ b/drivers/pwm/pwm-meson.c
> @@ -33,7 +33,7 @@
> #define MISC_A_CLK_DIV_SHIFT 8
> #define MISC_B_CLK_SEL_SHIFT 6
> #define MISC_A_CLK_SEL_SHIFT 4
> -#define MISC_CLK_SEL_WIDTH 2
> +#define MISC_CLK_SEL_MASK 0x3

NIT I would have used GENMASK here

> #define MISC_B_EN BIT(1)
> #define MISC_A_EN BIT(0)
>
> @@ -463,7 +463,7 @@ static int meson_pwm_init_channels(struct meson_pwm *meson,
>
> channel->mux.reg = meson->base + REG_MISC_AB;
> channel->mux.shift = mux_reg_shifts[i];
> - channel->mux.mask = BIT(MISC_CLK_SEL_WIDTH) - 1;
> + channel->mux.mask = MISC_CLK_SEL_MASK;
> channel->mux.flags = 0;
> channel->mux.lock = &meson->lock;
> channel->mux.table = NULL;
>

Anyway, it's still correct :

Reviewed-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>